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Alexander Chemeris alexander.chemeris at gmail.comOn Sat, Jul 21, 2012 at 12:44 AM, Thomas Tsou <thomastsou at gmail.com> wrote: > On Fri, Jul 20, 2012 at 6:09 PM, Alexander Chemeris > <alexander.chemeris at gmail.com> wrote: >> On Fri, Jul 20, 2012 at 10:22 PM, Thomas Tsou <thomastsou at gmail.com> wrote: >>> There are still other calibration issues, but phase noise is probably still >>> a concern. >> >> You mean LO leakage and I/Q balance? Have you calibrated them? They're >> very easy to do - I could guide you with Skype if needed. > > LO leakage is calibrated. I/Q balance is not. Are there steps for this > somewhere? I read 4.10 in the calibration guide, but I'm still not > sure how to proceed. I've started documenting this at the wiki: http://code.google.com/p/umtrx/wiki/LMS6002DCalibration#Tx_I/Q_balance_calibration Is that a good enough description for you? Note, that FPGA registers which control I/Q imbalance compensation has been changed in the commit which introduced dual-channel Tx: https://github.com/chemeris/UHD-Fairwaves/commit/3d80d881d82e93ed39e83f72d5ef5fac4f8ea56e Host side hasn't been updated to accommodate those register changes yet. I would appreciate if you could do that. -- Regards, Alexander Chemeris. CEO, Fairwaves LLC / ООО УмРадио http://fairwaves.ru