RFC: osmo-clk-gen v2

Müller, Marcus (CEL) mueller at kit.edu
Thu May 23 22:06:35 UTC 2019


On Thu, 2019-05-23 at 19:27 +0200, Martin Schramm wrote:
> For the tracking LOD, I first selected the TLE4250. But lowest output
> voltage of this part is 2.5V, and as we want to have e.g. 1V8 as well,
> another part has to be found.

yeah, that was my impression too once I searched ti.com for tracking
LDOs: the ones available are either exceedingly large or don't go far
enough down the voltage range.
Hm, what about a buffered voltage follower (i.e. NPN BJT's base on the
output of the opamp negative feedback and output on the emitter, VCC on
the collector)? Should give plenty of current, with limited CE voltage
drop but the ability to basically go to the negative rail with output
voltage. 

> I again took a buffer (voltage follower) formed of a generic R2R-IO,
> unity gain-stable CMOS opamp (MIC7300, TLV9001...). Those supply (or
> sink) 40 mA and more. But the max. output current depends on the output
> voltage, so, if we want to continue with that approach, I'd likely add a
> BJT current helper stage behind the opamp (BJT collector on 5V). We have
> almost no dynamic demands on that opamp, so disregarding any phase
> errors we introduce by driving large capacitive and resistive loads, it
> would work w/o a BJT, but let's see...

ah nevermind, I think we're thinking of the same.

> The DACVREFA (=ADCVREFA) pin has a limitation of AV_ref<= V_DDANA - 0.6V
> . As I'd want to have V_DDANA connected w/ a ferrite to V_DD (3V3), we
> can only use the internal reference 2, which is V_DDANA (SAMD21 ds:
> 37.11.5)

aaaah...

> So I don't see an external ref voltage input on that PCB... maybe your
> use case would explain your needs here! ;)

Don't have a use case of my own here, sorry :) Maybe then using a GPIO
pin PWM + FET + 2.54 mm jumper to VCC that doubles as external input
would be easiest? 

Best regards,
Marcus
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