<p>fixeria has uploaded this change for <strong>review</strong>.</p><p><a href="https://gerrit.osmocom.org/c/osmo-gsm-manuals/+/22867">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">TRXD: add initial proposal for TRXDv2<br><br>Change-Id: I03b2beeb535848b31fd629ba3cd330b43072c08b<br>Related: SYS#4895, OS#4941, OS#4006<br>---<br>M common/chapters/trx_if.adoc<br>1 file changed, 217 insertions(+), 2 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://gerrit.osmocom.org:29418/osmo-gsm-manuals refs/changes/67/22867/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/common/chapters/trx_if.adoc b/common/chapters/trx_if.adoc</span><br><span>index d1aa566..c9d502e 100644</span><br><span>--- a/common/chapters/trx_if.adoc</span><br><span>+++ b/common/chapters/trx_if.adoc</span><br><span>@@ -18,6 +18,9 @@</span><br><span> </span><br><span> The corresponding interface for every socket is at `P+100` on the BTS side.</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+NOTE: Starting from TRXDv2, it's possible to use only one socket for all</span><br><span style="color: hsl(120, 100%, 40%);">+channels. See <<trx_if_pdu_batching>> for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> [[trx_if_clock_ind]]</span><br><span> === Indications on the Master Clock Interface</span><br><span> </span><br><span>@@ -354,7 +357,7 @@</span><br><span> </span><br><span> === TRXD protocol</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-PDUs on the data interface carry one radio burst per one UDP packet.</span><br><span style="color: hsl(120, 100%, 40%);">+PDUs on the data interface carry one or multiple radio bursts per one UDP packet.</span><br><span> Two kinds of TRXD PDU exist:</span><br><span> </span><br><span> * `TRX -> L1` (from transceiver to the L1): Uplink messages received from the MS,</span><br><span>@@ -386,6 +389,11 @@</span><br><span> ** New field: MTS (Modulation and Training Sequence);</span><br><span> ** New field: C/I (Carrier-to-interface) ratio;</span><br><span> ** Downlink messages mostly unchanged.</span><br><span style="color: hsl(120, 100%, 40%);">+* TRXDv2 (proposed in January 2021):</span><br><span style="color: hsl(120, 100%, 40%);">+** Introduced the concept of burst batching (many bursts in one message);</span><br><span style="color: hsl(120, 100%, 40%);">+** Changed the field ordering (facilitating aligned access);</span><br><span style="color: hsl(120, 100%, 40%);">+** New field: batching indicator;</span><br><span style="color: hsl(120, 100%, 40%);">+** New field: SCPIR for VAMOS.</span><br><span> </span><br><span> ==== Uplink Data Burst</span><br><span> </span><br><span>@@ -448,6 +456,47 @@</span><br><span> }</span><br><span> ----</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+.TRXDv2 Uplink message structure</span><br><span style="color: hsl(120, 100%, 40%);">+[packetdiag]</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ colwidth = 32</span><br><span style="color: hsl(120, 100%, 40%);">+ node_height = 40</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ 0-3: VER(2)</span><br><span style="color: hsl(120, 100%, 40%);">+ 4: RES</span><br><span style="color: hsl(120, 100%, 40%);">+ 5-7: TN</span><br><span style="color: hsl(120, 100%, 40%);">+ 8-15: MTS</span><br><span style="color: hsl(120, 100%, 40%);">+ 16: BATCH</span><br><span style="color: hsl(120, 100%, 40%);">+ 17-23: SPARE (0)</span><br><span style="color: hsl(120, 100%, 40%);">+ 24-31: RSSI</span><br><span style="color: hsl(120, 100%, 40%);">+ 32-47: TOA256</span><br><span style="color: hsl(120, 100%, 40%);">+ 48-63: C/I</span><br><span style="color: hsl(120, 100%, 40%);">+ 64-95: FN</span><br><span style="color: hsl(120, 100%, 40%);">+ 96-127: Soft-bits</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+.TRXDv2 NOPE / IDLE indication message structure</span><br><span style="color: hsl(120, 100%, 40%);">+[packetdiag]</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ colwidth = 32</span><br><span style="color: hsl(120, 100%, 40%);">+ node_height = 40</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ 0-3: VER(2)</span><br><span style="color: hsl(120, 100%, 40%);">+ 4: RES</span><br><span style="color: hsl(120, 100%, 40%);">+ 5-7: TN</span><br><span style="color: hsl(120, 100%, 40%);">+ 8-15: MTS</span><br><span style="color: hsl(120, 100%, 40%);">+ 16: BATCH</span><br><span style="color: hsl(120, 100%, 40%);">+ 17-23: SPARE (0)</span><br><span style="color: hsl(120, 100%, 40%);">+ 24-31: RSSI</span><br><span style="color: hsl(120, 100%, 40%);">+ 32-47: TOA256</span><br><span style="color: hsl(120, 100%, 40%);">+ 48-63: C/I</span><br><span style="color: hsl(120, 100%, 40%);">+ 64-95: FN</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> VER: 4 bits::</span><br><span> TRXD header version, common for both `TRX -> L1` and `L1 -> TRX` directions.</span><br><span> </span><br><span>@@ -557,7 +606,7 @@</span><br><span> </span><br><span> ==== Downlink Data Burst</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-.TRXD Downlink data burst message structure</span><br><span style="color: hsl(120, 100%, 40%);">+.TRXDv0 and TRXDv1 Downlink data burst message structure</span><br><span> [packetdiag]</span><br><span> ----</span><br><span> {</span><br><span>@@ -573,6 +622,45 @@</span><br><span> }</span><br><span> ----</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+.TRXDv2 Downlink data burst message structure</span><br><span style="color: hsl(120, 100%, 40%);">+[packetdiag]</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ colwidth = 32</span><br><span style="color: hsl(120, 100%, 40%);">+ node_height = 40</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ 0-3: VER</span><br><span style="color: hsl(120, 100%, 40%);">+ 4: RES</span><br><span style="color: hsl(120, 100%, 40%);">+ 5-7: TN</span><br><span style="color: hsl(120, 100%, 40%);">+ 8-15: MTS</span><br><span style="color: hsl(120, 100%, 40%);">+ 16: BATCH</span><br><span style="color: hsl(120, 100%, 40%);">+ 17-23: SPARE (0)</span><br><span style="color: hsl(120, 100%, 40%);">+ 24-31: PWR</span><br><span style="color: hsl(120, 100%, 40%);">+ 32-63: FN</span><br><span style="color: hsl(120, 100%, 40%);">+ 64-95: Hard-bits</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+.TRXDv2 Downlink data burst message structure for AQPSK</span><br><span style="color: hsl(120, 100%, 40%);">+[packetdiag]</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ colwidth = 32</span><br><span style="color: hsl(120, 100%, 40%);">+ node_height = 40</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ 0-3: VER</span><br><span style="color: hsl(120, 100%, 40%);">+ 4: RES</span><br><span style="color: hsl(120, 100%, 40%);">+ 5-7: TN</span><br><span style="color: hsl(120, 100%, 40%);">+ 8-15: MTS</span><br><span style="color: hsl(120, 100%, 40%);">+ 16: BATCH</span><br><span style="color: hsl(120, 100%, 40%);">+ 17-19: SPARE (0)</span><br><span style="color: hsl(120, 100%, 40%);">+ 20-23: SCPIR</span><br><span style="color: hsl(120, 100%, 40%);">+ 24-31: PWR</span><br><span style="color: hsl(120, 100%, 40%);">+ 32-63: FN</span><br><span style="color: hsl(120, 100%, 40%);">+ 64-95: Hard-bits for V0/V1</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> VER: 4 bits::</span><br><span> TRXD header version, common for both `TRX -> L1` and `L1 -> TRX` directions.</span><br><span> </span><br><span>@@ -583,6 +671,10 @@</span><br><span> Reserved, shall be 0. It can be used in the future to extend the TDMA TN range</span><br><span> to (0..15), in case anybody would need to transfer UMTS bursts.</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+MTS: 8 bits (1 byte)::</span><br><span style="color: hsl(120, 100%, 40%);">+Contains the Modulation and Training Sequence information. See <<coding-mts>></span><br><span style="color: hsl(120, 100%, 40%);">+for more information on the encoding.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> FN: 32 bits (4 bytes)::</span><br><span> GSM frame number, big endian.</span><br><span> </span><br><span>@@ -591,6 +683,129 @@</span><br><span> in dB. The absolute value is set on the control interface, so the resulting</span><br><span> power is calculated as follows: `full_scale - (absolute_red + relative_red)`.</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+SCPIR: 4 bits::</span><br><span style="color: hsl(120, 100%, 40%);">+SCPIR (Subchannel Power Imbalance Ratio) - the ratio of power between Q and I</span><br><span style="color: hsl(120, 100%, 40%);">+channels for a VAMOS pair. Value range: 0 .. 10. This field shall be present</span><br><span style="color: hsl(120, 100%, 40%);">+when `MTC` field indicates the use of _AQPSK_ modulation. Otherwise all bits</span><br><span style="color: hsl(120, 100%, 40%);">+shall be set to 0.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> Hard-bits: 148 bytes for GSM, 444 bytes for EDGE::</span><br><span> Contains the downlink burst. Each hard-bit (1 or 0) of the burst is represented</span><br><span> using one byte (0x01 or 0x00 respectively).</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Hard-bits for V0/V1: 148 bytes each, 296 bytes total::</span><br><span style="color: hsl(120, 100%, 40%);">+This field contains two sequences of hard-bits (148 bytes each) for an _AQPSK_</span><br><span style="color: hsl(120, 100%, 40%);">+moduleted burst (VAMOS mode). The two sequences are *not* interleaved: one</span><br><span style="color: hsl(120, 100%, 40%);">+complete sequence for subscriber `V0` takes the first 148 bytes, then another</span><br><span style="color: hsl(120, 100%, 40%);">+complete sequence for subscriber `V1` takes the subsequent 148 bytes.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+[[trx_if_pdu_batching]]</span><br><span style="color: hsl(120, 100%, 40%);">+==== Burst batching</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Starting from TRXDv2, it's possible to combine several bursts into a single</span><br><span style="color: hsl(120, 100%, 40%);">+PDU - this is called _burst batching_. The purpose of _burst batching_ is</span><br><span style="color: hsl(120, 100%, 40%);">+to reduce socket load and eliminate possible PDU reordering, especially in</span><br><span style="color: hsl(120, 100%, 40%);">+a multi-TRX setup.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+.TRXDv2 Uplink PDU structure (batched part)</span><br><span style="color: hsl(120, 100%, 40%);">+[packetdiag]</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ colwidth = 32</span><br><span style="color: hsl(120, 100%, 40%);">+ node_height = 40</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ 0-3: TRXNR</span><br><span style="color: hsl(120, 100%, 40%);">+ 4: RES</span><br><span style="color: hsl(120, 100%, 40%);">+ 5-7: TN</span><br><span style="color: hsl(120, 100%, 40%);">+ 8-15: MTS</span><br><span style="color: hsl(120, 100%, 40%);">+ 16: BATCH</span><br><span style="color: hsl(120, 100%, 40%);">+ 17-23: SPARE (0)</span><br><span style="color: hsl(120, 100%, 40%);">+ 24-31: RSSI</span><br><span style="color: hsl(120, 100%, 40%);">+ 32-47: TOA256</span><br><span style="color: hsl(120, 100%, 40%);">+ 48-63: C/I</span><br><span style="color: hsl(120, 100%, 40%);">+ 64-95: Soft-bits</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+.TRXDv2 Downlink PDU structure (batched part)</span><br><span style="color: hsl(120, 100%, 40%);">+[packetdiag]</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ colwidth = 32</span><br><span style="color: hsl(120, 100%, 40%);">+ node_height = 40</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ 0-3: TRXNR</span><br><span style="color: hsl(120, 100%, 40%);">+ 4: RES</span><br><span style="color: hsl(120, 100%, 40%);">+ 5-7: TN</span><br><span style="color: hsl(120, 100%, 40%);">+ 8-15: MTS</span><br><span style="color: hsl(120, 100%, 40%);">+ 16: BATCH</span><br><span style="color: hsl(120, 100%, 40%);">+ 17-23: SPARE (0)</span><br><span style="color: hsl(120, 100%, 40%);">+ 24-31: PWR</span><br><span style="color: hsl(120, 100%, 40%);">+ 32-63: Hard-bits</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+TRXNR: 4 bits::</span><br><span style="color: hsl(120, 100%, 40%);">+Transceiver number (FIXME).</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+BATCH: 1 bit::</span><br><span style="color: hsl(120, 100%, 40%);">+This bit indicates whether a batched burst follows.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+The ordering of bursts may be different with the only requirement that all</span><br><span style="color: hsl(120, 100%, 40%);">+_batched_ bursts must belong to the same TDMA frame number indicated in the</span><br><span style="color: hsl(120, 100%, 40%);">+first part. Thus the following combinations are possible:</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+* a) one PDU contains bursts with the same TDMA timeslot number for all</span><br><span style="color: hsl(120, 100%, 40%);">+transceivers (8 PDUs per a TDMA frame);</span><br><span style="color: hsl(120, 100%, 40%);">+* one PDU contains complete TDMA frame with bursts for all 8 timeslots:</span><br><span style="color: hsl(120, 100%, 40%);">+** b) either for a single transceiver (N PDUs per a TDMA frame),</span><br><span style="color: hsl(120, 100%, 40%);">+** c) or for all transceivers (one PDU per a TDMA frame).</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+.Example: batched PDU structure for a)</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| TRX=0 | TDMA FN=F TN=T | Hard-/Soft-bits |</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| TRX=1 | TDMA FN=F TN=T | Hard-/Soft-bits |</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| TRX=2 | TDMA FN=F TN=T | Hard-/Soft-bits |</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| TRX=N | TDMA FN=F TN=T | Hard-/Soft-bits |</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+.Example: batched PDU structure for b)</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| TRX=N | TDMA FN=F TN=0 | Hard-/Soft-bits |</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| TRX=N | TDMA FN=F TN=1 | Hard-/Soft-bits |</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| TRX=N | TDMA FN=F TN=2 | Hard-/Soft-bits |</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| TRX=N | TDMA FN=F TN=7 | Hard-/Soft-bits |</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+.Example: batched PDU structure for c)</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| TRX=0 | TDMA FN=F TN=0 | Hard-/Soft-bits |</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| TRX=0 | TDMA FN=F TN=1 | Hard-/Soft-bits |</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| TRX=0 | TDMA FN=F TN=2 | Hard-/Soft-bits |</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| TRX=N | TDMA FN=F TN=5 | Hard-/Soft-bits |</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| TRX=N | TDMA FN=F TN=6 | Hard-/Soft-bits |</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+| TRX=N | TDMA FN=F TN=7 | Hard-/Soft-bits |</span><br><span style="color: hsl(120, 100%, 40%);">++-------+----------------+----------------------------------+</span><br><span style="color: hsl(120, 100%, 40%);">+----</span><br><span></span><br></pre><p>To view, visit <a href="https://gerrit.osmocom.org/c/osmo-gsm-manuals/+/22867">change 22867</a>. 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<div style="display:none"> Gerrit-Project: osmo-gsm-manuals </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I03b2beeb535848b31fd629ba3cd330b43072c08b </div>
<div style="display:none"> Gerrit-Change-Number: 22867 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: fixeria <vyanitskiy@sysmocom.de> </div>
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