<p>fixeria has uploaded this change for <strong>review</strong>.</p><p><a href="https://gerrit.osmocom.org/c/osmo-ttcn3-hacks/+/21491">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">BTS_Tests: add test cases for dynamic BS power control<br><br>Change-Id: Ia4c188aa923b10833162bdeb21238444193df65c<br>Related: SYS#4918<br>---<br>M bts/BTS_Tests.ttcn<br>1 file changed, 168 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://gerrit.osmocom.org:29418/osmo-ttcn3-hacks refs/changes/91/21491/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/bts/BTS_Tests.ttcn b/bts/BTS_Tests.ttcn</span><br><span>index 94bb0d6..d303257 100644</span><br><span>--- a/bts/BTS_Tests.ttcn</span><br><span>+++ b/bts/BTS_Tests.ttcn</span><br><span>@@ -103,6 +103,8 @@</span><br><span> integer mp_timing_offset_256syms_exp := 512;</span><br><span> integer mp_uplink_power_target := -75;</span><br><span> integer mp_uplink_power_hysteresis := 8; /* -83 .. -67 */</span><br><span style="color: hsl(120, 100%, 40%);">+ integer mp_downlink_power_target := -80;</span><br><span style="color: hsl(120, 100%, 40%);">+ integer mp_downlink_power_hysteresis := 5; /* -85 .. -75 */</span><br><span> /* Time to wait for RSL conn from BTS during startup of test */</span><br><span> float mp_ipa_up_timeout := 15.0;</span><br><span> float mp_ipa_up_delay := 0.0;</span><br><span>@@ -1881,7 +1883,7 @@</span><br><span> /* According to 3GPP TS 44.018, section 10.5.2.20, we should pad with zeroes */</span><br><span> var octetstring l2 := f_pad_oct(enc_LapdmFrameAB(valueof(lb)), 21, '00'O);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- log("Sending Measurement Report: ", l1h, l2);</span><br><span style="color: hsl(120, 100%, 40%);">+ log("Sending Measurement Report: ", l1h, lb);</span><br><span> L1CTL.send(ts_L1CTL_DATA_REQ_SACCH(g_chan_nr, ts_RslLinkID_SACCH(0), l1h, l2));</span><br><span> if (do_loop)</span><br><span> { repeat; }</span><br><span>@@ -7155,6 +7157,171 @@</span><br><span> Misc_Helpers.f_shutdown(__BFILE__, __LINE__);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+private type record of DlPwrStep DlPwrTest;</span><br><span style="color: hsl(120, 100%, 40%);">+private type record DlPwrStep {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Expected power reduction level */</span><br><span style="color: hsl(120, 100%, 40%);">+ integer txred_exp,</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Indicated measurement values */</span><br><span style="color: hsl(120, 100%, 40%);">+ record {</span><br><span style="color: hsl(120, 100%, 40%);">+ boolean valid,</span><br><span style="color: hsl(120, 100%, 40%);">+ MeasElem full,</span><br><span style="color: hsl(120, 100%, 40%);">+ MeasElem sub</span><br><span style="color: hsl(120, 100%, 40%);">+ } meas</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+private template (present) DlPwrStep.meas</span><br><span style="color: hsl(120, 100%, 40%);">+tp_DlPwrMeasFS(integer rxlev_full,</span><br><span style="color: hsl(120, 100%, 40%);">+ integer rxlev_sub,</span><br><span style="color: hsl(120, 100%, 40%);">+ uint3_t rxqual_full := 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ uint3_t rxqual_sub := 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ boolean valid := true) := {</span><br><span style="color: hsl(120, 100%, 40%);">+ valid := valid,</span><br><span style="color: hsl(120, 100%, 40%);">+ full := { rxlev_full, rxqual_full },</span><br><span style="color: hsl(120, 100%, 40%);">+ sub := { rxlev_sub, rxqual_sub }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Shortcut for FULL == SUB */</span><br><span style="color: hsl(120, 100%, 40%);">+private template (present) DlPwrStep.meas</span><br><span style="color: hsl(120, 100%, 40%);">+tp_DlPwrMeas(integer rxlev,</span><br><span style="color: hsl(120, 100%, 40%);">+ uint3_t rxqual := 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ boolean valid := true) :=</span><br><span style="color: hsl(120, 100%, 40%);">+ tp_DlPwrMeasFS(rxlev, rxlev, rxqual, rxqual, valid);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+private function f_TC_bs_pwr_ctrl_common(template (present) DlPwrTest tests)</span><br><span style="color: hsl(120, 100%, 40%);">+runs on ConnHdlr {</span><br><span style="color: hsl(120, 100%, 40%);">+ var integer num_steps := lengthof(tests);</span><br><span style="color: hsl(120, 100%, 40%);">+ timer T := 2.0 + 0.5 * int2float(num_steps);</span><br><span style="color: hsl(120, 100%, 40%);">+ var integer rxlev_sum := 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ var integer rxlev_num := 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ var L1ctlDlMessage l1_dl;</span><br><span style="color: hsl(120, 100%, 40%);">+ var integer step := -1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ f_l1_tune(L1CTL);</span><br><span style="color: hsl(120, 100%, 40%);">+ RSL.clear;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* These IEs are needed for autonomous BS power control */</span><br><span style="color: hsl(120, 100%, 40%);">+ var template (value) RSL_IE_List ies := {</span><br><span style="color: hsl(120, 100%, 40%);">+ t_RSL_IE(RSL_IE_MS_POWER, RSL_IE_Body:{</span><br><span style="color: hsl(120, 100%, 40%);">+ /* NOTE: this is actually power reduction (2 dB steps) */</span><br><span style="color: hsl(120, 100%, 40%);">+ bs_power := ts_RSL_IE_BS_Power(10) /* up to 20 dB */</span><br><span style="color: hsl(120, 100%, 40%);">+ }),</span><br><span style="color: hsl(120, 100%, 40%);">+ t_RSL_IE(RSL_IE_BS_POWER_PARAM, RSL_IE_Body:{</span><br><span style="color: hsl(120, 100%, 40%);">+ /* vendor-specific stuff */</span><br><span style="color: hsl(120, 100%, 40%);">+ bs_power_params := ts_RSL_LV(''O)</span><br><span style="color: hsl(120, 100%, 40%);">+ })</span><br><span style="color: hsl(120, 100%, 40%);">+ };</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* These values will be indicated in the first SACCH block */</span><br><span style="color: hsl(120, 100%, 40%);">+ g_pars.l1_pars.meas_ul.full := valueof(tests[0].meas.full);</span><br><span style="color: hsl(120, 100%, 40%);">+ g_pars.l1_pars.meas_ul.sub := valueof(tests[0].meas.sub);</span><br><span style="color: hsl(120, 100%, 40%);">+ g_pars.l1_pars.meas_valid := valueof(tests[0].meas.valid);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Establish a dedicated channel */</span><br><span style="color: hsl(120, 100%, 40%);">+ f_est_dchan(more_ies := valueof(ies));</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ T.start;</span><br><span style="color: hsl(120, 100%, 40%);">+ alt {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Align to the first DL SACCH block, this is where we start collecting samples */</span><br><span style="color: hsl(120, 100%, 40%);">+ [step == -1] L1CTL.receive(tr_L1CTL_DATA_IND(g_chan_nr, tr_RslLinkID_SACCH(?))) {</span><br><span style="color: hsl(120, 100%, 40%);">+ log("Step #", step, ": aligned to the first DL SACCH block");</span><br><span style="color: hsl(120, 100%, 40%);">+ step := step + 1;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ /* This altstep collects RxLev samples from all received DCCH/FACCH blocks */</span><br><span style="color: hsl(120, 100%, 40%);">+ [step >= 0] L1CTL.receive(tr_L1CTL_DATA_IND(g_chan_nr, tr_RslLinkID_DCCH(?))) -> value l1_dl {</span><br><span style="color: hsl(120, 100%, 40%);">+ log("Step #", step, ": new RxLev sample ", l1_dl.dl_info.rx_level);</span><br><span style="color: hsl(120, 100%, 40%);">+ rxlev_sum := rxlev_sum + l1_dl.dl_info.rx_level;</span><br><span style="color: hsl(120, 100%, 40%);">+ rxlev_num := rxlev_num + 1;</span><br><span style="color: hsl(120, 100%, 40%);">+ repeat;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ /* This altstep sends Measurement Reports with tests[step].meas */</span><br><span style="color: hsl(120, 100%, 40%);">+ [step >= 0] as_l1_sacch(do_loop := false) {</span><br><span style="color: hsl(120, 100%, 40%);">+ log("Step #", step, ": indicated ", tests[step].meas);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ var integer rxlev_avg := rxlev_sum / rxlev_num;</span><br><span style="color: hsl(120, 100%, 40%);">+ var integer txred := mp_rxlev_exp - rxlev_avg;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ log("Step #", step, ": checking rxlev_avg := ", rxlev_avg, " ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "(txred := ", txred, " vs expected ", tests[step].txred_exp, ")");</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (not match(txred, tests[step].txred_exp)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ setverdict(fail, "DL attenuation ", txred, " dB does not ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "match ", tests[step].txred_exp, " at step #", step);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ step := step + 1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (step < num_steps) {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* These values will be indicated in the next UL SACCH block */</span><br><span style="color: hsl(120, 100%, 40%);">+ g_pars.l1_pars.meas_ul.full := valueof(tests[step].meas.full);</span><br><span style="color: hsl(120, 100%, 40%);">+ g_pars.l1_pars.meas_ul.sub := valueof(tests[step].meas.sub);</span><br><span style="color: hsl(120, 100%, 40%);">+ g_pars.l1_pars.meas_valid := valueof(tests[step].meas.valid);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ rxlev_sum := 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ rxlev_num := 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ repeat;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ /* At this step, tests[0].meas is received by the IUT */</span><br><span style="color: hsl(120, 100%, 40%);">+ [false] L1CTL.receive(tr_L1CTL_MsgType(L1CTL_DATA_CONF)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ var integer rxlev_avg := rxlev_sum / rxlev_num;</span><br><span style="color: hsl(120, 100%, 40%);">+ var integer txred := mp_rxlev_exp - rxlev_avg;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ log("Step #", step, ": checking rxlev_avg := ", rxlev_avg, " ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "(txred := ", txred, " vs expected ", tests[step].txred_exp, ")");</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (not match(txred, tests[step].txred_exp)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ setverdict(fail, "DL attenuation ", txred, " dB does not ",</span><br><span style="color: hsl(120, 100%, 40%);">+ "match ", tests[step].txred_exp, " at step #", step);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ rxlev_sum := 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ rxlev_num := 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ [] L1CTL.receive { repeat; }</span><br><span style="color: hsl(120, 100%, 40%);">+ [] T.timeout {</span><br><span style="color: hsl(120, 100%, 40%);">+ setverdict(fail, "Timeout at step #", step, " ", tests[step]);</span><br><span style="color: hsl(120, 100%, 40%);">+ Misc_Helpers.f_shutdown(__BFILE__, __LINE__);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ setverdict(pass);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+private function f_TC_bs_pwr_ctrl(charstring id)</span><br><span style="color: hsl(120, 100%, 40%);">+runs on ConnHdlr {</span><br><span style="color: hsl(120, 100%, 40%);">+ f_TC_bs_pwr_ctrl_common(DlPwrTest:{</span><br><span style="color: hsl(120, 100%, 40%);">+ { txred_exp := ?, meas := tp_DlPwrMeas(mp_rxlev_exp) },</span><br><span style="color: hsl(120, 100%, 40%);">+ { txred_exp := 0, meas := tp_DlPwrMeas(mp_rxlev_exp) },</span><br><span style="color: hsl(120, 100%, 40%);">+ { txred_exp := 0, meas := tp_DlPwrMeas(mp_rxlev_exp) },</span><br><span style="color: hsl(120, 100%, 40%);">+ { txred_exp := 0, meas := tp_DlPwrMeas(mp_rxlev_exp) },</span><br><span style="color: hsl(120, 100%, 40%);">+ { txred_exp := 0, meas := tp_DlPwrMeas(mp_rxlev_exp) }</span><br><span style="color: hsl(120, 100%, 40%);">+ });</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+testcase TC_bs_pwr_ctrl() runs on test_CT {</span><br><span style="color: hsl(120, 100%, 40%);">+ var ConnHdlr vc_conn;</span><br><span style="color: hsl(120, 100%, 40%);">+ var ConnHdlrPars pars;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ f_init(trx_nr := 1);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Explicitly disable DL Power filtering for this set of tests */</span><br><span style="color: hsl(120, 100%, 40%);">+ f_vty_config(BTSVTY, "bts 0", "no downlink-power-filtering");</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Explicitly configure the Downlink power range (target and hysteresis) */</span><br><span style="color: hsl(120, 100%, 40%);">+ f_vty_config(BTSVTY, "bts 0", "downlink-power-target " & int2str(mp_downlink_power_target)</span><br><span style="color: hsl(120, 100%, 40%);">+ & " hysteresis " & int2str(mp_downlink_power_hysteresis));</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Wait until Pau ramping is completed */</span><br><span style="color: hsl(120, 100%, 40%);">+ f_sleep(4.0);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Pick any timeslot/subslot on TRX1 (TODO: use g_AllChanTypes) */</span><br><span style="color: hsl(120, 100%, 40%);">+ pars := valueof(t_Pars(g_AllChannels[0], ts_RSL_ChanMode_SIGN, 1));</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ vc_conn := f_start_handler(refers(f_TC_bs_pwr_ctrl), pars);</span><br><span style="color: hsl(120, 100%, 40%);">+ vc_conn.done;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* No need to reset Uplink power parameters - the IUT restarts anyway */</span><br><span style="color: hsl(120, 100%, 40%);">+ Misc_Helpers.f_shutdown(__BFILE__, __LINE__);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> private function f_TC_speech_no_rtp(charstring id) runs on ConnHdlr {</span><br><span> var template L1ctlDlMessage tr_bad_frame;</span><br><span> var L1ctlDlMessage l1_dl;</span><br><span></span><br></pre><p>To view, visit <a href="https://gerrit.osmocom.org/c/osmo-ttcn3-hacks/+/21491">change 21491</a>. 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<div style="display:none"> Gerrit-Project: osmo-ttcn3-hacks </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: Ia4c188aa923b10833162bdeb21238444193df65c </div>
<div style="display:none"> Gerrit-Change-Number: 21491 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: fixeria <vyanitskiy@sysmocom.de> </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>