<p>laforge <strong>submitted</strong> this change.</p><p><a href="https://gerrit.osmocom.org/c/pysim/+/20761">View Change</a></p><div style="white-space:pre-wrap">Approvals:
  Jenkins Builder: Verified
  laforge: Looks good to me, approved

</div><pre style="font-family: monospace,monospace; white-space: pre-wrap;">Remove unnecessary semicolon<br><br>Change-Id: I9c5665cd2a45a0d06444349eaaeeb5b83a09ffc1<br>---<br>M pySim-prog.py<br>M pySim/cards.py<br>M pySim/commands.py<br>M pySim/transport/pcsc.py<br>M pySim/transport/serial.py<br>5 files changed, 13 insertions(+), 13 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/pySim-prog.py b/pySim-prog.py</span><br><span>index 0f752fb..f2d3676 100755</span><br><span>--- a/pySim-prog.py</span><br><span>+++ b/pySim-prog.py</span><br><span>@@ -260,7 +260,7 @@</span><br><span>                        m = sum_</span><br><span>                     e = i</span><br><span>                        if m == 0:      # No overhead ? use this !</span><br><span style="color: hsl(0, 100%, 40%);">-                              break;</span><br><span style="color: hsl(120, 100%, 40%);">+                                break</span><br><span> </span><br><span>    # Generate output</span><br><span>    out = []</span><br><span>@@ -303,7 +303,7 @@</span><br><span> </span><br><span>   if opts.name is not None:</span><br><span>            if len(opts.name) > 16:</span><br><span style="color: hsl(0, 100%, 40%);">-                      raise ValueError('Service Provider Name must max 16 characters!');</span><br><span style="color: hsl(120, 100%, 40%);">+                    raise ValueError('Service Provider Name must max 16 characters!')</span><br><span> </span><br><span>        if opts.msisdn is not None:</span><br><span>          msisdn = opts.msisdn</span><br><span>@@ -320,7 +320,7 @@</span><br><span>   if opts.iccid is not None:</span><br><span>           iccid = opts.iccid</span><br><span>           if not _isnum(iccid, 19) and not _isnum(iccid, 20):</span><br><span style="color: hsl(0, 100%, 40%);">-                     raise ValueError('ICCID must be 19 or 20 digits !');</span><br><span style="color: hsl(120, 100%, 40%);">+                  raise ValueError('ICCID must be 19 or 20 digits !')</span><br><span> </span><br><span>      else:</span><br><span>                if opts.num is None:</span><br><span>@@ -492,15 +492,15 @@</span><br><span>                 if opts.num is not None and opts.read_iccid is False and opts.read_imsi is False:</span><br><span>                    if opts.num == i:</span><br><span>                            f.close()</span><br><span style="color: hsl(0, 100%, 40%);">-                               return row;</span><br><span style="color: hsl(120, 100%, 40%);">+                           return row</span><br><span>                   i += 1</span><br><span>               if row['iccid'] == iccid:</span><br><span>                    f.close()</span><br><span style="color: hsl(0, 100%, 40%);">-                       return row;</span><br><span style="color: hsl(120, 100%, 40%);">+                   return row</span><br><span> </span><br><span>               if row['imsi'] == imsi:</span><br><span>                      f.close()</span><br><span style="color: hsl(0, 100%, 40%);">-                       return row;</span><br><span style="color: hsl(120, 100%, 40%);">+                   return row</span><br><span> </span><br><span>       f.close()</span><br><span>    return None</span><br><span>diff --git a/pySim/cards.py b/pySim/cards.py</span><br><span>index a67540f..e949fff 100644</span><br><span>--- a/pySim/cards.py</span><br><span>+++ b/pySim/cards.py</span><br><span>@@ -329,7 +329,7 @@</span><br><span>               r = self._scc.select_file(['3f00', '7f4d', f[0]])</span><br><span>            rec_len = int(r[-1][28:30], 16)</span><br><span>              tlen = int(r[-1][4:8],16)</span><br><span style="color: hsl(0, 100%, 40%);">-               rec_cnt = (tlen / rec_len) - 1;</span><br><span style="color: hsl(120, 100%, 40%);">+               rec_cnt = (tlen / rec_len) - 1</span><br><span> </span><br><span>           if (rec_cnt < 1) or (rec_len != f[1]):</span><br><span>                    raise RuntimeError('Bad card type')</span><br><span>@@ -459,7 +459,7 @@</span><br><span>            r = self._scc.select_file(['3f00', '000c'])</span><br><span>          rec_len = int(r[-1][28:30], 16)</span><br><span>              tlen = int(r[-1][4:8],16)</span><br><span style="color: hsl(0, 100%, 40%);">-               rec_cnt = (tlen / rec_len) - 1;</span><br><span style="color: hsl(120, 100%, 40%);">+               rec_cnt = (tlen / rec_len) - 1</span><br><span> </span><br><span>           if (rec_cnt < 1) or (rec_len != 0x5a):</span><br><span>                    raise RuntimeError('Bad card type')</span><br><span>diff --git a/pySim/commands.py b/pySim/commands.py</span><br><span>index c260a97..7b8ebec 100644</span><br><span>--- a/pySim/commands.py</span><br><span>+++ b/pySim/commands.py</span><br><span>@@ -26,7 +26,7 @@</span><br><span> </span><br><span> class SimCardCommands(object):</span><br><span>       def __init__(self, transport):</span><br><span style="color: hsl(0, 100%, 40%);">-          self._tp = transport;</span><br><span style="color: hsl(120, 100%, 40%);">+         self._tp = transport</span><br><span>                 self._cla_byte = "a0"</span><br><span>              self.sel_ctrl = "0000"</span><br><span> </span><br><span>diff --git a/pySim/transport/pcsc.py b/pySim/transport/pcsc.py</span><br><span>index 380c8fd..4775a1b 100644</span><br><span>--- a/pySim/transport/pcsc.py</span><br><span>+++ b/pySim/transport/pcsc.py</span><br><span>@@ -35,7 +35,7 @@</span><br><span> class PcscSimLink(LinkBase):</span><br><span> </span><br><span>        def __init__(self, reader_number=0):</span><br><span style="color: hsl(0, 100%, 40%);">-            r = readers();</span><br><span style="color: hsl(120, 100%, 40%);">+                r = readers()</span><br><span>                self._reader = r[reader_number]</span><br><span>              self._con = self._reader.createConnection()</span><br><span> </span><br><span>diff --git a/pySim/transport/serial.py b/pySim/transport/serial.py</span><br><span>index 11fcd6a..61195e0 100644</span><br><span>--- a/pySim/transport/serial.py</span><br><span>+++ b/pySim/transport/serial.py</span><br><span>@@ -117,7 +117,7 @@</span><br><span>                       rst_meth = rst_meth_map[self._rst_pin[1:]]</span><br><span>                   rst_val  = rst_val_map[self._rst_pin[0]]</span><br><span>             except:</span><br><span style="color: hsl(0, 100%, 40%);">-                 raise ValueError('Invalid reset pin %s' % self._rst_pin);</span><br><span style="color: hsl(120, 100%, 40%);">+                     raise ValueError('Invalid reset pin %s' % self._rst_pin)</span><br><span> </span><br><span>                 rst_meth(rst_val)</span><br><span>            time.sleep(0.1)  # 100 ms</span><br><span>@@ -128,7 +128,7 @@</span><br><span>              if not b:</span><br><span>                    return 0</span><br><span>             if ord(b) != 0x3b:</span><br><span style="color: hsl(0, 100%, 40%);">-                      return -1;</span><br><span style="color: hsl(120, 100%, 40%);">+                    return -1</span><br><span>            self._dbg_print("TS: 0x%x Direct convention" % ord(b))</span><br><span> </span><br><span>                 while ord(b) == 0x3b:</span><br><span>@@ -222,7 +222,7 @@</span><br><span>                  if (to_recv == 2) and (b == '\x60'): # Ignore NIL if we have no RX data (hack ?)</span><br><span>                             continue</span><br><span>                     if not b:</span><br><span style="color: hsl(0, 100%, 40%);">-                               break;</span><br><span style="color: hsl(120, 100%, 40%);">+                                break</span><br><span>                        data += b</span><br><span> </span><br><span>                # Split datafield from SW</span><br><span></span><br></pre><p>To view, visit <a href="https://gerrit.osmocom.org/c/pysim/+/20761">change 20761</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://gerrit.osmocom.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://gerrit.osmocom.org/c/pysim/+/20761"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: pysim </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I9c5665cd2a45a0d06444349eaaeeb5b83a09ffc1 </div>
<div style="display:none"> Gerrit-Change-Number: 20761 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: daniel <dwillmann@sysmocom.de> </div>
<div style="display:none"> Gerrit-Reviewer: Jenkins Builder </div>
<div style="display:none"> Gerrit-Reviewer: laforge <laforge@osmocom.org> </div>
<div style="display:none"> Gerrit-MessageType: merged </div>