<p>laforge <strong>submitted</strong> this change.</p><p><a href="https://gerrit.osmocom.org/c/osmocom-bb/+/20328">View Change</a></p><div style="white-space:pre-wrap">Approvals:
laforge: Looks good to me, but someone else must approve
Vadim Yanitskiy: Looks good to me, approved
Jenkins Builder: Verified
</div><pre style="font-family: monospace,monospace; white-space: pre-wrap;">firmware: gtm900b: fix MEMIF configuration<br><br>* Switch Calypso output CS4/ADD22 to ADD22 function as needed<br> in order to access the upper half of the flash on GTM900 hw<br> variant MG01GSMT.<br><br>* Set WS=4 for safety - please refer to this technical article for<br> the underlying theory:<br><br>https://www.freecalypso.org/hg/freecalypso-docs/file/tip/MEMIF-wait-states<br><br>Related: OS#4769<br>Change-Id: I1923243937d7251f6bcfe71a0b1cc0e206a81cfa<br>---<br>M src/target/firmware/board/gtm900b/init.c<br>1 file changed, 19 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/target/firmware/board/gtm900b/init.c b/src/target/firmware/board/gtm900b/init.c</span><br><span>index f04d314..8de9956 100644</span><br><span>--- a/src/target/firmware/board/gtm900b/init.c</span><br><span>+++ b/src/target/firmware/board/gtm900b/init.c</span><br><span>@@ -50,6 +50,7 @@</span><br><span> </span><br><span> #define ARMIO_LATCH_OUT 0xfffe4802</span><br><span> #define IO_CNTL_REG 0xfffe4804</span><br><span style="color: hsl(120, 100%, 40%);">+#define ARM_CONF_REG 0xfffef006</span><br><span> #define ASIC_CONF_REG 0xfffef008</span><br><span> #define IO_CONF_REG 0xfffef00a</span><br><span> #define LPG_LCR_REG 0xfffe7800</span><br><span>@@ -77,13 +78,28 @@</span><br><span> /* Set LPG output permanently on (power LED) */</span><br><span> writew(1, LPG_PM_REG);</span><br><span> writew((1 << 7), LPG_LCR_REG);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* configure ADD(22), needed for second half of flash on MG01GSMT */</span><br><span style="color: hsl(120, 100%, 40%);">+ reg = readw(ARM_CONF_REG);</span><br><span style="color: hsl(120, 100%, 40%);">+ reg |= (1 << 3);</span><br><span style="color: hsl(120, 100%, 40%);">+ writew(reg, ARM_CONF_REG);</span><br><span> }</span><br><span> </span><br><span> void board_init(int with_irq)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- /* Configure the memory interface */</span><br><span style="color: hsl(0, 100%, 40%);">- calypso_mem_cfg(CALYPSO_nCS0, 3, CALYPSO_MEM_16bit, 1);</span><br><span style="color: hsl(0, 100%, 40%);">- calypso_mem_cfg(CALYPSO_nCS1, 3, CALYPSO_MEM_16bit, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Configure the memory interface.</span><br><span style="color: hsl(120, 100%, 40%);">+ * Huawei's official fw sets WS=4 for RAM, but not for flash -</span><br><span style="color: hsl(120, 100%, 40%);">+ * but let's be consistent and use WS=4 for both. Please refer</span><br><span style="color: hsl(120, 100%, 40%);">+ * to this technical article for the underlying theory:</span><br><span style="color: hsl(120, 100%, 40%);">+https://www.freecalypso.org/hg/freecalypso-docs/file/tip/MEMIF-wait-states</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ calypso_mem_cfg(CALYPSO_nCS0, 4, CALYPSO_MEM_16bit, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+ calypso_mem_cfg(CALYPSO_nCS1, 4, CALYPSO_MEM_16bit, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * The remaining 3 chip selects are unused on this hw,</span><br><span style="color: hsl(120, 100%, 40%);">+ * thus their settings are dummies.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span> calypso_mem_cfg(CALYPSO_nCS2, 5, CALYPSO_MEM_16bit, 1);</span><br><span> calypso_mem_cfg(CALYPSO_nCS3, 5, CALYPSO_MEM_16bit, 1);</span><br><span> calypso_mem_cfg(CALYPSO_CS4, 0, CALYPSO_MEM_8bit, 1);</span><br><span></span><br></pre><p>To view, visit <a href="https://gerrit.osmocom.org/c/osmocom-bb/+/20328">change 20328</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://gerrit.osmocom.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://gerrit.osmocom.org/c/osmocom-bb/+/20328"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: osmocom-bb </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I1923243937d7251f6bcfe71a0b1cc0e206a81cfa </div>
<div style="display:none"> Gerrit-Change-Number: 20328 </div>
<div style="display:none"> Gerrit-PatchSet: 2 </div>
<div style="display:none"> Gerrit-Owner: laforge <laforge@osmocom.org> </div>
<div style="display:none"> Gerrit-Reviewer: Jenkins Builder </div>
<div style="display:none"> Gerrit-Reviewer: Vadim Yanitskiy <vyanitskiy@sysmocom.de> </div>
<div style="display:none"> Gerrit-Reviewer: laforge <laforge@osmocom.org> </div>
<div style="display:none"> Gerrit-MessageType: merged </div>