<p>laforge <strong>submitted</strong> this change.</p><p><a href="https://gerrit.osmocom.org/c/osmo-pcu/+/18386">View Change</a></p><div style="white-space:pre-wrap">Approvals:
pespin: Looks good to me, approved
Jenkins Builder: Verified
</div><pre style="font-family: monospace,monospace; white-space: pre-wrap;">bts: refactor handling and parsing of RACH.ind<br><br>This patch is a set of tightly related changes:<br><br> - group all RACH.ind parameters into struct 'rach_ind_params';<br> - group Channel Request parameters into struct 'chan_req_params';<br> - get rid of egprs_mslot_class_from_ra(), priority_from_ra(),<br> and is_single_block(), introduce unified parse_rach_ind();<br> - improve logging, get rid of redundant information.<br><br>This is needed for proper EGPRS Packet Channel Request handling.<br><br>Change-Id: I5fe7e0f51bf5c9eac073935cc4f4edd667c67c6e<br>Related: OS#1548<br>---<br>M src/bts.cpp<br>M src/bts.h<br>M src/pcu_l1_if.cpp<br>M tests/tbf/TbfTest.cpp<br>M tests/tbf/TbfTest.err<br>5 files changed, 279 insertions(+), 330 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/bts.cpp b/src/bts.cpp</span><br><span>index 8941403..2a74978 100644</span><br><span>--- a/src/bts.cpp</span><br><span>+++ b/src/bts.cpp</span><br><span>@@ -677,191 +677,165 @@</span><br><span> }</span><br><span> </span><br><span> /* 3GPP TS 44.060:</span><br><span style="color: hsl(0, 100%, 40%);">- * Table 11.2.5.3: PACKET CHANNEL REQUEST</span><br><span style="color: hsl(0, 100%, 40%);">- * Table 11.2.5a.3: EGPRS PACKET CHANNEL REQUEST</span><br><span style="color: hsl(0, 100%, 40%);">- * Both GPRS and EGPRS use same MultislotClass coding, but since use of PCCCH is</span><br><span style="color: hsl(120, 100%, 40%);">+ * Table 11.2.5.2: PACKET CHANNEL REQUEST</span><br><span style="color: hsl(120, 100%, 40%);">+ * Table 11.2.5a.2: EGPRS PACKET CHANNEL REQUEST</span><br><span style="color: hsl(120, 100%, 40%);">+ * Both GPRS and EGPRS use same MultislotClass coding, but since PRACH is</span><br><span> * deprecated, no PACKET CHANNEL REQUEST exists, which means for GPRS we will</span><br><span> * receive CCCH RACH which doesn't contain any mslot class. Hence in the end we</span><br><span style="color: hsl(0, 100%, 40%);">- * can only receive EGPRS mslot class through 11-bit EGPRS PACKET CHANNEL</span><br><span style="color: hsl(0, 100%, 40%);">- * REQUEST.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-static inline uint8_t egprs_mslot_class_from_ra(uint16_t ra, bool is_11bit)</span><br><span style="color: hsl(120, 100%, 40%);">+ * can only receive EGPRS mslot class through 11-bit EGPRS PACKET CHANNEL REQUEST. */</span><br><span style="color: hsl(120, 100%, 40%);">+static int parse_egprs_pkt_ch_req(uint16_t ra11, struct chan_req_params *chan_req)</span><br><span> {</span><br><span> /* EGPRS multislot class is only present in One Phase Access Request */</span><br><span style="color: hsl(0, 100%, 40%);">- if (is_11bit && (ra >> 10) == 0x00) /* .0xx xxx. .... */</span><br><span style="color: hsl(0, 100%, 40%);">- return ((ra & 0x3e0) >> 5) + 1;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* set EGPRS multislot class to 0 for 8-bit RACH, since we don't know it yet */</span><br><span style="color: hsl(0, 100%, 40%);">- return 0;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static inline uint16_t priority_from_ra(uint16_t ra, bool is_11bit)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- if (is_11bit)</span><br><span style="color: hsl(0, 100%, 40%);">- return (ra & 0x18) >> 3;</span><br><span style="color: hsl(120, 100%, 40%);">+ if ((ra11 >> 10) == 0x00) /* .0xx xxx. .... */</span><br><span style="color: hsl(120, 100%, 40%);">+ chan_req->egprs_mslot_class = ((ra11 & 0x3e0) >> 5) + 1;</span><br><span> </span><br><span> return 0;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static inline bool is_single_block(bool force_two_phase, uint16_t ra, enum ph_burst_type burst_type, bool is_11bit)</span><br><span style="color: hsl(120, 100%, 40%);">+/* NOTE: chan_req needs to be zero-initialized by the caller */</span><br><span style="color: hsl(120, 100%, 40%);">+static int parse_rach_ind(const struct rach_ind_params *rip,</span><br><span style="color: hsl(120, 100%, 40%);">+ struct chan_req_params *chan_req)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- bool sb = false;</span><br><span style="color: hsl(120, 100%, 40%);">+ int rc;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- if ((ra & 0xf8) == 0x70)</span><br><span style="color: hsl(0, 100%, 40%);">- LOGP(DRLCMAC, LOGL_DEBUG, "MS requests single block allocation\n");</span><br><span style="color: hsl(0, 100%, 40%);">- else if (force_two_phase)</span><br><span style="color: hsl(0, 100%, 40%);">- LOGP(DRLCMAC, LOGL_DEBUG,</span><br><span style="color: hsl(0, 100%, 40%);">- "MS requests single phase access, but we force two phase access [RACH is %s bit]\n",</span><br><span style="color: hsl(0, 100%, 40%);">- is_11bit ? "11" : "8");</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- switch(burst_type) {</span><br><span style="color: hsl(0, 100%, 40%);">- case GSM_L1_BURST_TYPE_ACCESS_0:</span><br><span style="color: hsl(0, 100%, 40%);">- if (is_11bit) {</span><br><span style="color: hsl(0, 100%, 40%);">- LOGP(DRLCMAC, LOGL_ERROR, "Error: GPRS 11 bit RACH not supported\n");</span><br><span style="color: hsl(0, 100%, 40%);">- return false;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if ((ra & 0xf8) == 0x70)</span><br><span style="color: hsl(0, 100%, 40%);">- return true;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (force_two_phase)</span><br><span style="color: hsl(0, 100%, 40%);">- return true;</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case GSM_L1_BURST_TYPE_ACCESS_1: /* deliberate fall-through */</span><br><span style="color: hsl(0, 100%, 40%);">- case GSM_L1_BURST_TYPE_ACCESS_2:</span><br><span style="color: hsl(0, 100%, 40%);">- if (is_11bit) {</span><br><span style="color: hsl(0, 100%, 40%);">- if (!(ra & (1 << 10))) {</span><br><span style="color: hsl(0, 100%, 40%);">- if (force_two_phase)</span><br><span style="color: hsl(0, 100%, 40%);">- return true;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return false;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return true;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- LOGP(DRLCMAC, LOGL_ERROR, "Unexpected RACH burst type %u for 8-bit RACH\n", burst_type);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (rip->burst_type) {</span><br><span> case GSM_L1_BURST_TYPE_NONE:</span><br><span style="color: hsl(0, 100%, 40%);">- LOGP(DRLCMAC, LOGL_ERROR, "PCU has not received burst type from BTS\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ LOGP(DRLCMAC, LOGL_ERROR, "RACH.ind contains no burst type, assuming TS0\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ /* fall-through */</span><br><span style="color: hsl(120, 100%, 40%);">+ case GSM_L1_BURST_TYPE_ACCESS_0:</span><br><span style="color: hsl(120, 100%, 40%);">+ if (rip->is_11bit) { /* 11 bit Access Burst with TS0 => Packet Channel Request */</span><br><span style="color: hsl(120, 100%, 40%);">+ LOGP(DRLCMAC, LOGL_ERROR, "11 bit Packet Channel Request "</span><br><span style="color: hsl(120, 100%, 40%);">+ "is not supported (PBCCH is deprecated)\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ return -ENOTSUP;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* 3GPP TS 44.018, table 9.1.8.1: 8 bit CHANNEL REQUEST.</span><br><span style="color: hsl(120, 100%, 40%);">+ * Mask 01110xxx indicates single block packet access. */</span><br><span style="color: hsl(120, 100%, 40%);">+ chan_req->single_block = ((rip->ra & 0xf8) == 0x70);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case GSM_L1_BURST_TYPE_ACCESS_1:</span><br><span style="color: hsl(120, 100%, 40%);">+ case GSM_L1_BURST_TYPE_ACCESS_2:</span><br><span style="color: hsl(120, 100%, 40%);">+ if (!rip->is_11bit) { /* TS1/TS2 => EGPRS Packet Channel Request (always 11 bit) */</span><br><span style="color: hsl(120, 100%, 40%);">+ LOGP(DRLCMAC, LOGL_ERROR, "11 bit Packet Channel Request "</span><br><span style="color: hsl(120, 100%, 40%);">+ "is not supported (PBCCH is deprecated)\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ return -ENOTSUP;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = parse_egprs_pkt_ch_req(rip->ra, chan_req);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (rc)</span><br><span style="color: hsl(120, 100%, 40%);">+ return rc;</span><br><span> break;</span><br><span> default:</span><br><span style="color: hsl(0, 100%, 40%);">- LOGP(DRLCMAC, LOGL_ERROR, "Unexpected RACH burst type %u for %s-bit RACH\n",</span><br><span style="color: hsl(0, 100%, 40%);">- burst_type, is_11bit ? "11" : "8");</span><br><span style="color: hsl(120, 100%, 40%);">+ LOGP(DRLCMAC, LOGL_ERROR, "RACH.ind contains unknown burst type 0x%02x "</span><br><span style="color: hsl(120, 100%, 40%);">+ "(%u bit)\n", rip->burst_type, rip->is_11bit ? 11 : 8);</span><br><span style="color: hsl(120, 100%, 40%);">+ return -EINVAL;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- return sb;</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-int BTS::rcv_rach(uint16_t ra, uint32_t Fn, int16_t qta, bool is_11bit,</span><br><span style="color: hsl(0, 100%, 40%);">- enum ph_burst_type burst_type)</span><br><span style="color: hsl(120, 100%, 40%);">+int BTS::rcv_rach(const struct rach_ind_params *rip)</span><br><span> {</span><br><span style="color: hsl(120, 100%, 40%);">+ struct chan_req_params chan_req = { 0 };</span><br><span> struct gprs_rlcmac_ul_tbf *tbf = NULL;</span><br><span style="color: hsl(0, 100%, 40%);">- uint8_t trx_no, ts_no = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- uint8_t sb = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint8_t trx_no, ts_no;</span><br><span> uint32_t sb_fn = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- int rc = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- int plen;</span><br><span> uint8_t usf = 7;</span><br><span style="color: hsl(0, 100%, 40%);">- uint8_t tsc = 0, ta = qta2ta(qta);</span><br><span style="color: hsl(0, 100%, 40%);">- uint8_t egprs_ms_class = egprs_mslot_class_from_ra(ra, is_11bit);</span><br><span style="color: hsl(0, 100%, 40%);">- bool failure = false;</span><br><span style="color: hsl(0, 100%, 40%);">- GprsMs *ms;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint8_t tsc = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ int plen, rc;</span><br><span> </span><br><span> do_rate_ctr_inc(CTR_RACH_REQUESTS);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- if (is_11bit)</span><br><span style="color: hsl(120, 100%, 40%);">+ if (rip->is_11bit)</span><br><span> do_rate_ctr_inc(CTR_11BIT_RACH_REQUESTS);</span><br><span> </span><br><span> /* Determine full frame number */</span><br><span style="color: hsl(0, 100%, 40%);">- Fn = rfn_to_fn(Fn);</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t Fn = rfn_to_fn(rip->rfn);</span><br><span style="color: hsl(120, 100%, 40%);">+ uint8_t ta = qta2ta(rip->qta);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- send_gsmtap(PCU_GSMTAP_C_UL_RACH, true, 0, ts_no, GSMTAP_CHANNEL_RACH,</span><br><span style="color: hsl(0, 100%, 40%);">- Fn, (uint8_t*)&ra, is_11bit ? 2 : 1);</span><br><span style="color: hsl(120, 100%, 40%);">+ send_gsmtap(PCU_GSMTAP_C_UL_RACH, true, rip->trx_nr, rip->ts_nr,</span><br><span style="color: hsl(120, 100%, 40%);">+ GSMTAP_CHANNEL_RACH, Fn, (uint8_t *) &rip->ra,</span><br><span style="color: hsl(120, 100%, 40%);">+ rip->is_11bit ? 2 : 1);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- LOGP(DRLCMAC, LOGL_DEBUG, "MS requests UL TBF on RACH, "</span><br><span style="color: hsl(0, 100%, 40%);">- "so we provide one: ra=0x%02x Fn=%u qta=%d is_11bit=%d:\n",</span><br><span style="color: hsl(0, 100%, 40%);">- ra, Fn, qta, is_11bit);</span><br><span style="color: hsl(120, 100%, 40%);">+ LOGP(DRLCMAC, LOGL_DEBUG, "MS requests Uplink resource on CCCH/RACH: "</span><br><span style="color: hsl(120, 100%, 40%);">+ "ra=0x%02x (%d bit) Fn=%u qta=%d\n", rip->ra,</span><br><span style="color: hsl(120, 100%, 40%);">+ rip->is_11bit ? 11 : 8, Fn, rip->qta);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- sb = is_single_block(m_bts.force_two_phase, ra, burst_type, is_11bit);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Parse [EGPRS Packet] Channel Request from RACH.ind */</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = parse_rach_ind(rip, &chan_req);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (rc) /* Send RR Immediate Assignment Reject */</span><br><span style="color: hsl(120, 100%, 40%);">+ goto send_imm_ass_rej;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- if (sb) {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (chan_req.single_block)</span><br><span style="color: hsl(120, 100%, 40%);">+ LOGP(DRLCMAC, LOGL_DEBUG, "MS requests single block allocation\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ else if (m_bts.force_two_phase) {</span><br><span style="color: hsl(120, 100%, 40%);">+ LOGP(DRLCMAC, LOGL_DEBUG, "MS requests single block allocation, "</span><br><span style="color: hsl(120, 100%, 40%);">+ "but we force two phase access\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ chan_req.single_block = true;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Should we allocate a single block or an Uplink TBF? */</span><br><span style="color: hsl(120, 100%, 40%);">+ if (chan_req.single_block) {</span><br><span> rc = sba()->alloc(&trx_no, &ts_no, &sb_fn, ta);</span><br><span> if (rc < 0) {</span><br><span style="color: hsl(0, 100%, 40%);">- failure = true;</span><br><span> LOGP(DRLCMAC, LOGL_NOTICE, "No PDCH resource for "</span><br><span style="color: hsl(0, 100%, 40%);">- "single block allocation."</span><br><span style="color: hsl(0, 100%, 40%);">- "sending Immediate "</span><br><span style="color: hsl(0, 100%, 40%);">- "Assignment Uplink (AGCH) reject\n");</span><br><span style="color: hsl(0, 100%, 40%);">- } else {</span><br><span style="color: hsl(0, 100%, 40%);">- tsc = m_bts.trx[trx_no].pdch[ts_no].tsc;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- LOGP(DRLCMAC, LOGL_DEBUG, "RX: [PCU <- BTS] RACH "</span><br><span style="color: hsl(0, 100%, 40%);">- " qbit-ta=%d ra=0x%02x, Fn=%d (%d,%d,%d),"</span><br><span style="color: hsl(0, 100%, 40%);">- " SBFn=%d\n",</span><br><span style="color: hsl(0, 100%, 40%);">- qta, ra,</span><br><span style="color: hsl(0, 100%, 40%);">- Fn, (Fn / (26 * 51)) % 32, Fn % 51, Fn % 26,</span><br><span style="color: hsl(0, 100%, 40%);">- sb_fn);</span><br><span style="color: hsl(0, 100%, 40%);">- LOGP(DRLCMAC, LOGL_INFO, "TX: Immediate Assignment "</span><br><span style="color: hsl(0, 100%, 40%);">- "Uplink (AGCH)\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ "single block allocation: rc=%d\n", rc);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Send RR Immediate Assignment Reject */</span><br><span style="color: hsl(120, 100%, 40%);">+ goto send_imm_ass_rej;</span><br><span> }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ tsc = m_bts.trx[trx_no].pdch[ts_no].tsc;</span><br><span style="color: hsl(120, 100%, 40%);">+ LOGP(DRLCMAC, LOGL_DEBUG, "Allocated a single block at "</span><br><span style="color: hsl(120, 100%, 40%);">+ "SBFn=%u TRX=%u TS=%u\n", sb_fn, trx_no, ts_no);</span><br><span> } else {</span><br><span style="color: hsl(0, 100%, 40%);">- ms = ms_alloc(0, egprs_ms_class);</span><br><span style="color: hsl(0, 100%, 40%);">- // Create new TBF</span><br><span style="color: hsl(0, 100%, 40%);">- /* FIXME: Copy and paste with other routines.. */</span><br><span style="color: hsl(120, 100%, 40%);">+ GprsMs *ms = ms_alloc(0, chan_req.egprs_mslot_class);</span><br><span> tbf = tbf_alloc_ul_tbf(&m_bts, ms, -1, true);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> if (!tbf) {</span><br><span style="color: hsl(0, 100%, 40%);">- LOGP(DRLCMAC, LOGL_NOTICE, "No PDCH resource sending "</span><br><span style="color: hsl(0, 100%, 40%);">- "Immediate Assignment Uplink (AGCH) "</span><br><span style="color: hsl(0, 100%, 40%);">- "reject\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ LOGP(DRLCMAC, LOGL_NOTICE, "No PDCH resource for Uplink TBF\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Send RR Immediate Assignment Reject */</span><br><span> rc = -EBUSY;</span><br><span style="color: hsl(0, 100%, 40%);">- failure = true;</span><br><span style="color: hsl(0, 100%, 40%);">- } else {</span><br><span style="color: hsl(0, 100%, 40%);">- tbf->set_ta(ta);</span><br><span style="color: hsl(0, 100%, 40%);">- TBF_SET_STATE(tbf, GPRS_RLCMAC_FLOW);</span><br><span style="color: hsl(0, 100%, 40%);">- TBF_ASS_TYPE_SET(tbf, GPRS_RLCMAC_FLAG_CCCH);</span><br><span style="color: hsl(0, 100%, 40%);">- T_START(tbf, T3169, 3169, "RACH (new UL-TBF)", true);</span><br><span style="color: hsl(0, 100%, 40%);">- LOGPTBF(tbf, LOGL_DEBUG, "[UPLINK] START\n");</span><br><span style="color: hsl(0, 100%, 40%);">- LOGPTBF(tbf, LOGL_DEBUG, "RX: [PCU <- BTS] RACH "</span><br><span style="color: hsl(0, 100%, 40%);">- "qbit-ta=%d ra=0x%02x, Fn=%d "</span><br><span style="color: hsl(0, 100%, 40%);">- " (%d,%d,%d)\n",</span><br><span style="color: hsl(0, 100%, 40%);">- qta, ra, Fn, (Fn / (26 * 51)) % 32,</span><br><span style="color: hsl(0, 100%, 40%);">- Fn % 51, Fn % 26);</span><br><span style="color: hsl(0, 100%, 40%);">- LOGPTBF(tbf, LOGL_INFO, "TX: START Immediate Assignment Uplink (AGCH)\n");</span><br><span style="color: hsl(0, 100%, 40%);">- trx_no = tbf->trx->trx_no;</span><br><span style="color: hsl(0, 100%, 40%);">- ts_no = tbf->first_ts;</span><br><span style="color: hsl(0, 100%, 40%);">- usf = tbf->m_usf[ts_no];</span><br><span style="color: hsl(0, 100%, 40%);">- tsc = tbf->tsc();</span><br><span style="color: hsl(120, 100%, 40%);">+ goto send_imm_ass_rej;</span><br><span> }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* FIXME: Copy and paste with other routines.. */</span><br><span style="color: hsl(120, 100%, 40%);">+ tbf->set_ta(ta);</span><br><span style="color: hsl(120, 100%, 40%);">+ TBF_SET_STATE(tbf, GPRS_RLCMAC_FLOW);</span><br><span style="color: hsl(120, 100%, 40%);">+ TBF_ASS_TYPE_SET(tbf, GPRS_RLCMAC_FLAG_CCCH);</span><br><span style="color: hsl(120, 100%, 40%);">+ T_START(tbf, T3169, 3169, "RACH (new UL-TBF)", true);</span><br><span style="color: hsl(120, 100%, 40%);">+ trx_no = tbf->trx->trx_no;</span><br><span style="color: hsl(120, 100%, 40%);">+ ts_no = tbf->first_ts;</span><br><span style="color: hsl(120, 100%, 40%);">+ usf = tbf->m_usf[ts_no];</span><br><span style="color: hsl(120, 100%, 40%);">+ tsc = tbf->tsc();</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">- bitvec *immediate_assignment = bitvec_alloc(22, tall_pcu_ctx) /* without plen */;</span><br><span style="color: hsl(0, 100%, 40%);">- bitvec_unhex(immediate_assignment,</span><br><span style="color: hsl(0, 100%, 40%);">- "2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b");</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+send_imm_ass_rej:</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Allocate a bit-vector for RR Immediate Assignment [Reject] */</span><br><span style="color: hsl(120, 100%, 40%);">+ struct bitvec *bv = bitvec_alloc(22, tall_pcu_ctx); /* without plen */</span><br><span style="color: hsl(120, 100%, 40%);">+ bitvec_unhex(bv, "2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b");</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- if (failure) {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (rc != 0) {</span><br><span style="color: hsl(120, 100%, 40%);">+ LOGP(DRLCMAC, LOGL_DEBUG, "Tx Immediate Assignment Reject on AGCH\n");</span><br><span> plen = Encoding::write_immediate_assignment_reject(</span><br><span style="color: hsl(0, 100%, 40%);">- immediate_assignment, ra, Fn,</span><br><span style="color: hsl(0, 100%, 40%);">- burst_type);</span><br><span style="color: hsl(120, 100%, 40%);">+ bv, rip->ra, Fn, rip->burst_type);</span><br><span> do_rate_ctr_inc(CTR_IMMEDIATE_ASSIGN_REJ);</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- else {</span><br><span style="color: hsl(0, 100%, 40%);">- LOGP(DRLCMAC, LOGL_DEBUG,</span><br><span style="color: hsl(0, 100%, 40%);">- " - TRX=%d (%d) TS=%d TA=%d TSC=%d TFI=%d USF=%d\n",</span><br><span style="color: hsl(0, 100%, 40%);">- trx_no, m_bts.trx[trx_no].arfcn, ts_no, ta, tsc,</span><br><span style="color: hsl(0, 100%, 40%);">- tbf ? tbf->tfi() : -1, usf);</span><br><span style="color: hsl(0, 100%, 40%);">- // N. B: if tbf == NULL then SBA is used for Imm. Ass. below</span><br><span style="color: hsl(0, 100%, 40%);">- plen = Encoding::write_immediate_assignment(tbf, immediate_assignment, false, ra, Fn, ta,</span><br><span style="color: hsl(0, 100%, 40%);">- m_bts.trx[trx_no].arfcn, ts_no, tsc, usf, false, sb_fn,</span><br><span style="color: hsl(0, 100%, 40%);">- m_bts.alpha, m_bts.gamma, -1, burst_type);</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (plen >= 0) {</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ LOGP(DRLCMAC, LOGL_DEBUG, "Tx Immediate Assignment on AGCH: "</span><br><span style="color: hsl(120, 100%, 40%);">+ "TRX=%u (ARFCN %u) TS=%u TA=%u TSC=%u TFI=%d USF=%d\n",</span><br><span style="color: hsl(120, 100%, 40%);">+ trx_no, m_bts.trx[trx_no].arfcn & ~ARFCN_FLAG_MASK,</span><br><span style="color: hsl(120, 100%, 40%);">+ ts_no, ta, tsc, tbf ? tbf->tfi() : -1, usf);</span><br><span style="color: hsl(120, 100%, 40%);">+ plen = Encoding::write_immediate_assignment(</span><br><span style="color: hsl(120, 100%, 40%);">+ tbf, bv, false, rip->ra, Fn, ta, m_bts.trx[trx_no].arfcn,</span><br><span style="color: hsl(120, 100%, 40%);">+ ts_no, tsc, usf, false, sb_fn, m_bts.alpha, m_bts.gamma, -1,</span><br><span style="color: hsl(120, 100%, 40%);">+ rip->burst_type);</span><br><span> do_rate_ctr_inc(CTR_IMMEDIATE_ASSIGN_UL_TBF);</span><br><span style="color: hsl(0, 100%, 40%);">- pcu_l1if_tx_agch(immediate_assignment, plen);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- bitvec_free(immediate_assignment);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (plen >= 0)</span><br><span style="color: hsl(120, 100%, 40%);">+ pcu_l1if_tx_agch(bv, plen);</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = plen;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ bitvec_free(bv);</span><br><span> </span><br><span> return rc;</span><br><span> }</span><br><span>@@ -874,25 +848,25 @@</span><br><span> 324, 350, 376, 402,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-int BTS::rcv_ptcch_rach(uint8_t trx_nr, uint8_t ts_nr, uint32_t fn, int16_t qta)</span><br><span style="color: hsl(120, 100%, 40%);">+int BTS::rcv_ptcch_rach(const struct rach_ind_params *rip)</span><br><span> {</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t fn416 = rfn_to_fn(rip->rfn) % 416;</span><br><span> struct gprs_rlcmac_bts *bts = bts_data();</span><br><span> struct gprs_rlcmac_pdch *pdch;</span><br><span style="color: hsl(0, 100%, 40%);">- uint32_t fn416 = fn % 416;</span><br><span> uint8_t ss;</span><br><span> </span><br><span> /* Prevent buffer overflow */</span><br><span style="color: hsl(0, 100%, 40%);">- if (trx_nr >= ARRAY_SIZE(bts->trx) || ts_nr >= 8) {</span><br><span style="color: hsl(0, 100%, 40%);">- LOGP(DRLCMAC, LOGL_ERROR, "Malformed RACH.ind message "</span><br><span style="color: hsl(0, 100%, 40%);">- "(TRX=%u TS=%u FN=%u)\n", trx_nr, ts_nr, fn);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (rip->trx_nr >= ARRAY_SIZE(bts->trx) || rip->ts_nr >= 8) {</span><br><span style="color: hsl(120, 100%, 40%);">+ LOGP(DRLCMAC, LOGL_ERROR, "(TRX=%u TS=%u RFN=%u) Rx malformed "</span><br><span style="color: hsl(120, 100%, 40%);">+ "RACH.ind (PTCCH/U)\n", rip->trx_nr, rip->ts_nr, rip->rfn);</span><br><span> return -EINVAL;</span><br><span> }</span><br><span> </span><br><span> /* Make sure PDCH time-slot is enabled */</span><br><span style="color: hsl(0, 100%, 40%);">- pdch = &bts->trx[trx_nr].pdch[ts_nr];</span><br><span style="color: hsl(120, 100%, 40%);">+ pdch = &bts->trx[rip->trx_nr].pdch[rip->ts_nr];</span><br><span> if (!pdch->m_is_enabled) {</span><br><span style="color: hsl(0, 100%, 40%);">- LOGP(DRLCMAC, LOGL_NOTICE, "Rx PTCCH RACH.ind for inactive PDCH "</span><br><span style="color: hsl(0, 100%, 40%);">- "(TRX=%u TS=%u FN=%u)\n", trx_nr, ts_nr, fn);</span><br><span style="color: hsl(120, 100%, 40%);">+ LOGP(DRLCMAC, LOGL_NOTICE, "(TRX=%u TS=%u RFN=%u) Rx RACH.ind (PTCCH/U) "</span><br><span style="color: hsl(120, 100%, 40%);">+ "for inactive PDCH\n", rip->trx_nr, rip->ts_nr, rip->rfn);</span><br><span> return -EAGAIN;</span><br><span> }</span><br><span> </span><br><span>@@ -901,14 +875,15 @@</span><br><span> if (ptcch_slot_map[ss] == fn416)</span><br><span> break;</span><br><span> if (ss == PTCCH_TAI_NUM) {</span><br><span style="color: hsl(0, 100%, 40%);">- LOGP(DRLCMAC, LOGL_ERROR, "Failed to map PTCCH/U sub-slot for fn=%u\n", fn);</span><br><span style="color: hsl(120, 100%, 40%);">+ LOGP(DRLCMAC, LOGL_ERROR, "(TRX=%u TS=%u RFN=%u) Failed to map "</span><br><span style="color: hsl(120, 100%, 40%);">+ "PTCCH/U sub-slot\n", rip->trx_nr, rip->ts_nr, rip->rfn);</span><br><span> return -ENODEV;</span><br><span> }</span><br><span> </span><br><span> /* Apply the new Timing Advance value */</span><br><span> LOGP(DRLCMAC, LOGL_INFO, "Continuous Timing Advance update "</span><br><span style="color: hsl(0, 100%, 40%);">- "for TAI %u, new TA is %u\n", ss, qta2ta(qta));</span><br><span style="color: hsl(0, 100%, 40%);">- pdch->update_ta(ss, qta2ta(qta));</span><br><span style="color: hsl(120, 100%, 40%);">+ "for TAI %u, new TA is %u\n", ss, qta2ta(rip->qta));</span><br><span style="color: hsl(120, 100%, 40%);">+ pdch->update_ta(ss, qta2ta(rip->qta));</span><br><span> </span><br><span> return 0;</span><br><span> }</span><br><span>diff --git a/src/bts.h b/src/bts.h</span><br><span>index aae8b43..e6b7aa3 100644</span><br><span>--- a/src/bts.h</span><br><span>+++ b/src/bts.h</span><br><span>@@ -267,6 +267,24 @@</span><br><span> STAT_MS_PRESENT,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/* RACH.ind parameters (to be parsed) */</span><br><span style="color: hsl(120, 100%, 40%);">+struct rach_ind_params {</span><br><span style="color: hsl(120, 100%, 40%);">+ enum ph_burst_type burst_type;</span><br><span style="color: hsl(120, 100%, 40%);">+ bool is_11bit;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint16_t ra;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint8_t trx_nr;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint8_t ts_nr;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t rfn;</span><br><span style="color: hsl(120, 100%, 40%);">+ int16_t qta;</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* [EGPRS Packet] Channel Request parameters (parsed) */</span><br><span style="color: hsl(120, 100%, 40%);">+struct chan_req_params {</span><br><span style="color: hsl(120, 100%, 40%);">+ unsigned int egprs_mslot_class;</span><br><span style="color: hsl(120, 100%, 40%);">+ unsigned int priority;</span><br><span style="color: hsl(120, 100%, 40%);">+ bool single_block;</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #ifdef __cplusplus</span><br><span> /**</span><br><span> * I represent a GSM BTS. I have one or more TRX, I know the current</span><br><span>@@ -302,9 +320,8 @@</span><br><span> int rcv_imm_ass_cnf(const uint8_t *data, uint32_t fn);</span><br><span> </span><br><span> uint32_t rfn_to_fn(int32_t rfn);</span><br><span style="color: hsl(0, 100%, 40%);">- int rcv_rach(uint16_t ra, uint32_t Fn, int16_t qta, bool is_11bit,</span><br><span style="color: hsl(0, 100%, 40%);">- enum ph_burst_type burst_type);</span><br><span style="color: hsl(0, 100%, 40%);">- int rcv_ptcch_rach(uint8_t trx_nr, uint8_t ts_nr, uint32_t fn, int16_t qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ int rcv_rach(const struct rach_ind_params *rip);</span><br><span style="color: hsl(120, 100%, 40%);">+ int rcv_ptcch_rach(const struct rach_ind_params *rip);</span><br><span> </span><br><span> void snd_dl_ass(gprs_rlcmac_tbf *tbf, bool poll, uint16_t pgroup);</span><br><span> </span><br><span>diff --git a/src/pcu_l1_if.cpp b/src/pcu_l1_if.cpp</span><br><span>index 8764024..23f6fbb 100644</span><br><span>--- a/src/pcu_l1_if.cpp</span><br><span>+++ b/src/pcu_l1_if.cpp</span><br><span>@@ -432,10 +432,21 @@</span><br><span> /* C -> C++ adapter for direct DSP access code (e.g. osmo-bts-sysmo) */</span><br><span> extern "C" int pcu_rx_rach_ind_ptcch(uint8_t trx_nr, uint8_t ts_nr, uint32_t fn, int16_t qta)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- return BTS::main_bts()->rcv_ptcch_rach(trx_nr, ts_nr, fn, qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ struct rach_ind_params rip = {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* The content of RA is not of interest on PTCCH/U */</span><br><span style="color: hsl(120, 100%, 40%);">+ .burst_type = GSM_L1_BURST_TYPE_ACCESS_0,</span><br><span style="color: hsl(120, 100%, 40%);">+ .is_11bit = false,</span><br><span style="color: hsl(120, 100%, 40%);">+ .ra = 0x00,</span><br><span style="color: hsl(120, 100%, 40%);">+ .trx_nr = trx_nr,</span><br><span style="color: hsl(120, 100%, 40%);">+ .ts_nr = ts_nr,</span><br><span style="color: hsl(120, 100%, 40%);">+ .rfn = fn,</span><br><span style="color: hsl(120, 100%, 40%);">+ .qta = qta,</span><br><span style="color: hsl(120, 100%, 40%);">+ };</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return BTS::main_bts()->rcv_ptcch_rach(&rip);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int pcu_rx_rach_ind(struct gsm_pcu_if_rach_ind *rach_ind)</span><br><span style="color: hsl(120, 100%, 40%);">+static int pcu_rx_rach_ind(const struct gsm_pcu_if_rach_ind *rach_ind)</span><br><span> {</span><br><span> int rc = 0;</span><br><span> int current_fn = get_current_fn();</span><br><span>@@ -444,17 +455,22 @@</span><br><span> "qta=%d, ra=0x%02x, fn=%u, cur_fn=%d, is_11bit=%d\n", rach_ind->sapi, rach_ind->qta,</span><br><span> rach_ind->ra, rach_ind->fn, current_fn, rach_ind->is_11bit);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+ struct rach_ind_params rip = {</span><br><span style="color: hsl(120, 100%, 40%);">+ .burst_type = (enum ph_burst_type) rach_ind->burst_type,</span><br><span style="color: hsl(120, 100%, 40%);">+ .is_11bit = rach_ind->is_11bit > 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ .ra = rach_ind->ra,</span><br><span style="color: hsl(120, 100%, 40%);">+ .trx_nr = rach_ind->trx_nr,</span><br><span style="color: hsl(120, 100%, 40%);">+ .ts_nr = rach_ind->ts_nr,</span><br><span style="color: hsl(120, 100%, 40%);">+ .rfn = rach_ind->fn,</span><br><span style="color: hsl(120, 100%, 40%);">+ .qta = rach_ind->qta,</span><br><span style="color: hsl(120, 100%, 40%);">+ };</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> switch (rach_ind->sapi) {</span><br><span> case PCU_IF_SAPI_RACH:</span><br><span style="color: hsl(0, 100%, 40%);">- rc = BTS::main_bts()->rcv_rach(</span><br><span style="color: hsl(0, 100%, 40%);">- rach_ind->ra, rach_ind->fn,</span><br><span style="color: hsl(0, 100%, 40%);">- rach_ind->qta, rach_ind->is_11bit,</span><br><span style="color: hsl(0, 100%, 40%);">- (ph_burst_type)rach_ind->burst_type);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = BTS::main_bts()->rcv_rach(&rip);</span><br><span> break;</span><br><span> case PCU_IF_SAPI_PTCCH:</span><br><span style="color: hsl(0, 100%, 40%);">- rc = BTS::main_bts()->rcv_ptcch_rach(</span><br><span style="color: hsl(0, 100%, 40%);">- rach_ind->trx_nr, rach_ind->ts_nr,</span><br><span style="color: hsl(0, 100%, 40%);">- rach_ind->fn, rach_ind->qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = BTS::main_bts()->rcv_ptcch_rach(&rip);</span><br><span> break;</span><br><span> default:</span><br><span> LOGP(DL1IF, LOGL_ERROR, "Received PCU rach request with "</span><br><span>diff --git a/tests/tbf/TbfTest.cpp b/tests/tbf/TbfTest.cpp</span><br><span>index 561fc7c..b16c089 100644</span><br><span>--- a/tests/tbf/TbfTest.cpp</span><br><span>+++ b/tests/tbf/TbfTest.cpp</span><br><span>@@ -54,6 +54,21 @@</span><br><span> /* Measurements shared by all unit tests */</span><br><span> static struct pcu_l1_meas meas;</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+static int bts_handle_rach(BTS *bts, uint16_t ra, uint32_t Fn, int16_t qta)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct rach_ind_params rip = {</span><br><span style="color: hsl(120, 100%, 40%);">+ .burst_type = GSM_L1_BURST_TYPE_ACCESS_0,</span><br><span style="color: hsl(120, 100%, 40%);">+ .is_11bit = false,</span><br><span style="color: hsl(120, 100%, 40%);">+ .ra = ra,</span><br><span style="color: hsl(120, 100%, 40%);">+ .trx_nr = 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ .ts_nr = 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ .rfn = Fn,</span><br><span style="color: hsl(120, 100%, 40%);">+ .qta = qta,</span><br><span style="color: hsl(120, 100%, 40%);">+ };</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return bts->rcv_rach(&rip);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> static void check_tbf(gprs_rlcmac_tbf *tbf)</span><br><span> {</span><br><span> OSMO_ASSERT(tbf);</span><br><span>@@ -581,7 +596,7 @@</span><br><span> </span><br><span> tfi = the_bts->tfi_find_free(GPRS_RLCMAC_UL_TBF, &trx_no, -1);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- the_bts->rcv_rach(0x03, *fn, qta, 0, GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(120, 100%, 40%);">+ bts_handle_rach(the_bts, 0x03, *fn, qta);</span><br><span> </span><br><span> ul_tbf = the_bts->ul_tbf_by_tfi(tfi, trx_no, ts_no);</span><br><span> OSMO_ASSERT(ul_tbf != NULL);</span><br><span>@@ -667,7 +682,7 @@</span><br><span> * simulate RACH, this sends an Immediate</span><br><span> * Assignment Uplink on the AGCH</span><br><span> */</span><br><span style="color: hsl(0, 100%, 40%);">- the_bts->rcv_rach(0x73, rach_fn, qta, 0, GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(120, 100%, 40%);">+ bts_handle_rach(the_bts, 0x73, rach_fn, qta);</span><br><span> </span><br><span> /* get next free TFI */</span><br><span> tfi = the_bts->tfi_find_free(GPRS_RLCMAC_UL_TBF, &trx_no, -1);</span><br><span>@@ -814,7 +829,7 @@</span><br><span> * simulate RACH, this sends an Immediate</span><br><span> * Assignment Uplink on the AGCH</span><br><span> */</span><br><span style="color: hsl(0, 100%, 40%);">- the_bts->rcv_rach(0x73, rach_fn, qta, 0, GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(120, 100%, 40%);">+ bts_handle_rach(the_bts, 0x73, rach_fn, qta);</span><br><span> </span><br><span> /* get next free TFI */</span><br><span> tfi = the_bts->tfi_find_free(GPRS_RLCMAC_UL_TBF, &trx_no, -1);</span><br><span>@@ -1249,7 +1264,7 @@</span><br><span> * simulate RACH, this sends an Immediate</span><br><span> * Assignment Uplink on the AGCH</span><br><span> */</span><br><span style="color: hsl(0, 100%, 40%);">- the_bts->rcv_rach(0x73, rach_fn, qta, 0, GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(120, 100%, 40%);">+ bts_handle_rach(the_bts, 0x73, rach_fn, qta);</span><br><span> </span><br><span> /* get next free TFI */</span><br><span> tfi = the_bts->tfi_find_free(GPRS_RLCMAC_UL_TBF, &trx_no, -1);</span><br><span>@@ -1562,7 +1577,7 @@</span><br><span> request_dl_rlc_block(bts, trx_no, ts_no, fn);</span><br><span> </span><br><span> /* simulate RACH, sends an Immediate Assignment Uplink on the AGCH */</span><br><span style="color: hsl(0, 100%, 40%);">- the_bts->rcv_rach(0x73, rach_fn, qta, 0, GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(120, 100%, 40%);">+ bts_handle_rach(the_bts, 0x73, rach_fn, qta);</span><br><span> </span><br><span> /* get next free TFI */</span><br><span> tfi = the_bts->tfi_find_free(GPRS_RLCMAC_UL_TBF, &trx_no, -1);</span><br><span>@@ -1777,8 +1792,7 @@</span><br><span> * simulate RACH, sends an Immediate Assignment</span><br><span> * Uplink reject on the AGCH</span><br><span> */</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x70, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x70, rach_fn, qta);</span><br><span> </span><br><span> OSMO_ASSERT(rc == -EINVAL);</span><br><span> </span><br><span>@@ -1807,22 +1821,14 @@</span><br><span> * simulate RACH, sends an Immediate Assignment Uplink</span><br><span> * reject on the AGCH</span><br><span> */</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x78, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x79, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x7a, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x7b, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x7c, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x7d, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x7e, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x7f, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x78, rach_fn, qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x79, rach_fn, qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x7a, rach_fn, qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x7b, rach_fn, qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x7c, rach_fn, qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x7d, rach_fn, qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x7e, rach_fn, qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x7f, rach_fn, qta);</span><br><span> </span><br><span> OSMO_ASSERT(rc == -EBUSY);</span><br><span> </span><br><span>@@ -2359,7 +2365,7 @@</span><br><span> * simulate RACH, this sends an Immediate</span><br><span> * Assignment Uplink on the AGCH</span><br><span> */</span><br><span style="color: hsl(0, 100%, 40%);">- the_bts->rcv_rach(0x73, rach_fn, qta, 0, GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(120, 100%, 40%);">+ bts_handle_rach(the_bts, 0x73, rach_fn, qta);</span><br><span> </span><br><span> /* get next free TFI */</span><br><span> tfi = the_bts->tfi_find_free(GPRS_RLCMAC_UL_TBF, &trx_no, -1);</span><br><span>@@ -3174,20 +3180,13 @@</span><br><span> /*</span><br><span> * Trigger rach till resources(USF) exhaust</span><br><span> */</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x78, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x79, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x7a, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x7b, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x7c, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x7d, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(0, 100%, 40%);">- rc = the_bts.rcv_rach(0x7e, rach_fn, qta, 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GSM_L1_BURST_TYPE_ACCESS_0);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x78, rach_fn, qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x79, rach_fn, qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x7a, rach_fn, qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x7b, rach_fn, qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x7c, rach_fn, qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x7d, rach_fn, qta);</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = bts_handle_rach(&the_bts, 0x7e, rach_fn, qta);</span><br><span> </span><br><span> /* fake a resource request */</span><br><span> ulreq.u.MESSAGE_TYPE = MT_PACKET_RESOURCE_REQUEST;</span><br><span>diff --git a/tests/tbf/TbfTest.err b/tests/tbf/TbfTest.err</span><br><span>index 57787c5..827f5ce 100644</span><br><span>--- a/tests/tbf/TbfTest.err</span><br><span>+++ b/tests/tbf/TbfTest.err</span><br><span>@@ -1443,7 +1443,7 @@</span><br><span> === start test_tbf_single_phase ===</span><br><span> Searching for first unallocated TFI: TRX=0</span><br><span> Found TFI=0.</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x03 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x03 (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -1464,10 +1464,7 @@</span><br><span> TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x03, Fn=2654167 (17,25,9)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=0 USF=0</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=0 USF=0</span><br><span> Got CS-1 RLC block: R=0, SI=0, TFI=0, CPS=0, RSB=0, rc=184</span><br><span> TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) UL DATA TFI=0 received (V(Q)=0 .. V(R)=0)</span><br><span> MS (IMSI ): Link quality 12dB (old 12dB) left window [0, 0], modifying uplink CS level: CS-1 -> CS-2</span><br><span>@@ -1515,11 +1512,10 @@</span><br><span> TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=ASSIGN) appending 4 bytes</span><br><span> === end test_tbf_single_phase ===</span><br><span> === start test_tbf_two_phase ===</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31</span><br><span> MS requests single block allocation</span><br><span style="color: hsl(0, 100%, 40%);">-RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270</span><br><span style="color: hsl(0, 100%, 40%);">-TX: Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span style="color: hsl(120, 100%, 40%);">+Allocated a single block at SBFn=2654270 TRX=0 TS=7</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span> Searching for first unallocated TFI: TRX=0</span><br><span> Found TFI=0.</span><br><span> +++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++</span><br><span>@@ -1597,11 +1593,10 @@</span><br><span> TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=ASSIGN) appending 4 bytes</span><br><span> === end test_tbf_two_phase ===</span><br><span> === start test_tbf_ra_update_rach ===</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31</span><br><span> MS requests single block allocation</span><br><span style="color: hsl(0, 100%, 40%);">-RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270</span><br><span style="color: hsl(0, 100%, 40%);">-TX: Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span style="color: hsl(120, 100%, 40%);">+Allocated a single block at SBFn=2654270 TRX=0 TS=7</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span> Searching for first unallocated TFI: TRX=0</span><br><span> Found TFI=0.</span><br><span> +++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++</span><br><span>@@ -1723,11 +1718,10 @@</span><br><span> TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=FINISHED) Copying 1 RLC blocks, 1 BSNs</span><br><span> TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=FINISHED) Copying data unit 0 (BSN 0)</span><br><span> TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=FINISHED) msg block (BSN 0, CS-4): 07 01 00 29 52 41 55 5f 41 43 43 45 50 54 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 00 </span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654232 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654232 qta=31</span><br><span> MS requests single block allocation</span><br><span style="color: hsl(0, 100%, 40%);">-RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654232 (17,39,22), SBFn=2654335</span><br><span style="color: hsl(0, 100%, 40%);">-TX: Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span style="color: hsl(120, 100%, 40%);">+Allocated a single block at SBFn=2654335 TRX=0 TS=7</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span> Searching for first unallocated TFI: TRX=0</span><br><span> Found TFI=1.</span><br><span> TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=FINISHED) poll timeout for FN=2654292, TS=7 (curr FN 2654335)</span><br><span>@@ -1794,11 +1788,10 @@</span><br><span> New MS: TLLI = 0xf5667788, TA = 7, IMSI = 0011223344, LLC = 1</span><br><span> === end test_tbf_ra_update_rach ===</span><br><span> === start test_tbf_dl_flow_and_rach_two_phase ===</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31</span><br><span> MS requests single block allocation</span><br><span style="color: hsl(0, 100%, 40%);">-RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270</span><br><span style="color: hsl(0, 100%, 40%);">-TX: Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span style="color: hsl(120, 100%, 40%);">+Allocated a single block at SBFn=2654270 TRX=0 TS=7</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span> Searching for first unallocated TFI: TRX=0</span><br><span> Found TFI=0.</span><br><span> +++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++</span><br><span>@@ -1884,11 +1877,10 @@</span><br><span> PDCH(TS 7, TRX 0): Detaching TBF(TFI=0 TLLI=0xf1223344 DIR=UL STATE=FLOW), 0 TBFs, USFs = 00, TFIs = 00000000.</span><br><span> Detaching TBF from MS object, TLLI = 0xf1223344, TBF = TBF(TFI=0 TLLI=0xf1223344 DIR=UL STATE=FLOW)</span><br><span> ********** UL-TBF ends here **********</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654224 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654224 qta=31</span><br><span> MS requests single block allocation</span><br><span style="color: hsl(0, 100%, 40%);">-RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654224 (17,31,14), SBFn=2654327</span><br><span style="color: hsl(0, 100%, 40%);">-TX: Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span style="color: hsl(120, 100%, 40%);">+Allocated a single block at SBFn=2654327 TRX=0 TS=7</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span> Searching for first unallocated TFI: TRX=0</span><br><span> Found TFI=0.</span><br><span> +++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++</span><br><span>@@ -1966,11 +1958,10 @@</span><br><span> New MS: TLLI = 0xf1223344, TA = 7, IMSI = 0011223344, LLC = 2</span><br><span> === end test_tbf_dl_flow_and_rach_two_phase ===</span><br><span> === start test_tbf_dl_flow_and_rach_single_phase ===</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31</span><br><span> MS requests single block allocation</span><br><span style="color: hsl(0, 100%, 40%);">-RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270</span><br><span style="color: hsl(0, 100%, 40%);">-TX: Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span style="color: hsl(120, 100%, 40%);">+Allocated a single block at SBFn=2654270 TRX=0 TS=7</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span> Searching for first unallocated TFI: TRX=0</span><br><span> Found TFI=0.</span><br><span> +++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++</span><br><span>@@ -2058,7 +2049,7 @@</span><br><span> ********** UL-TBF ends here **********</span><br><span> Searching for first unallocated TFI: TRX=0</span><br><span> Found TFI=0.</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x03 Fn=2654275 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x03 (8 bit) Fn=2654275 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -2079,10 +2070,7 @@</span><br><span> TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x03, Fn=2654275 (17,31,13)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=0 USF=0</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=0 USF=0</span><br><span> Got CS-1 RLC block: R=0, SI=0, TFI=0, CPS=0, RSB=0, rc=184</span><br><span> TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) UL DATA TFI=0 received (V(Q)=0 .. V(R)=0)</span><br><span> MS (IMSI ): Link quality 12dB (old 12dB) left window [0, 0], modifying uplink CS level: CS-1 -> CS-2</span><br><span>@@ -2117,11 +2105,10 @@</span><br><span> New MS: TLLI = 0xf1223344, TA = 7, IMSI = 0011223344, LLC = 2</span><br><span> === end test_tbf_dl_flow_and_rach_single_phase ===</span><br><span> === start test_tbf_dl_reuse ===</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31</span><br><span> MS requests single block allocation</span><br><span style="color: hsl(0, 100%, 40%);">-RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270</span><br><span style="color: hsl(0, 100%, 40%);">-TX: Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span style="color: hsl(120, 100%, 40%);">+Allocated a single block at SBFn=2654270 TRX=0 TS=7</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span> Searching for first unallocated TFI: TRX=0</span><br><span> Found TFI=0.</span><br><span> +++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++</span><br><span>@@ -3140,11 +3127,10 @@</span><br><span> ********** DL-TBF ends here **********</span><br><span> === end test_tbf_ws ===</span><br><span> === start test_tbf_egprs_two_phase ===</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31</span><br><span> MS requests single block allocation</span><br><span style="color: hsl(0, 100%, 40%);">-RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270</span><br><span style="color: hsl(0, 100%, 40%);">-TX: Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span style="color: hsl(120, 100%, 40%);">+Allocated a single block at SBFn=2654270 TRX=0 TS=7</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span> Searching for first unallocated TFI: TRX=0</span><br><span> Found TFI=0.</span><br><span> +++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++</span><br><span>@@ -3232,11 +3218,10 @@</span><br><span> TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=ASSIGN EGPRS) appending 256 bytes</span><br><span> === end test_tbf_egprs_two_phase ===</span><br><span> === start test_tbf_egprs_two_phase_spb ===</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31</span><br><span> MS requests single block allocation</span><br><span style="color: hsl(0, 100%, 40%);">-RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270</span><br><span style="color: hsl(0, 100%, 40%);">-TX: Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span style="color: hsl(120, 100%, 40%);">+Allocated a single block at SBFn=2654270 TRX=0 TS=7</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span> Searching for first unallocated TFI: TRX=0</span><br><span> Found TFI=0.</span><br><span> +++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++</span><br><span>@@ -5871,11 +5856,10 @@</span><br><span> ********** DL-TBF ends here **********</span><br><span> === end test_tbf_egprs_spb_dl ===</span><br><span> === start test_tbf_puan_urbb_len ===</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31</span><br><span> MS requests single block allocation</span><br><span style="color: hsl(0, 100%, 40%);">-RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270</span><br><span style="color: hsl(0, 100%, 40%);">-TX: Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span style="color: hsl(120, 100%, 40%);">+Allocated a single block at SBFn=2654270 TRX=0 TS=7</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span> Searching for first unallocated TFI: TRX=0</span><br><span> Found TFI=0.</span><br><span> +++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++</span><br><span>@@ -6036,11 +6020,10 @@</span><br><span> ********** DL-TBF ends here **********</span><br><span> === end test_tbf_update_ws ===</span><br><span> === start test_tbf_li_decoding ===</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31</span><br><span> MS requests single block allocation</span><br><span style="color: hsl(0, 100%, 40%);">-RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270</span><br><span style="color: hsl(0, 100%, 40%);">-TX: Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span style="color: hsl(120, 100%, 40%);">+Allocated a single block at SBFn=2654270 TRX=0 TS=7</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span> Searching for first unallocated TFI: TRX=0</span><br><span> Found TFI=0.</span><br><span> +++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++</span><br><span>@@ -6182,7 +6165,7 @@</span><br><span> ********** DL-TBF ends here **********</span><br><span> === end test_tbf_epdan_out_of_rx_window ===</span><br><span> === start test_immediate_assign_rej_multi_block ===</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x78 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x78 (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -6203,11 +6186,8 @@</span><br><span> TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x78, Fn=2654167 (17,25,9)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=0 USF=0</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x79 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=0 USF=0</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x79 (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -6228,11 +6208,8 @@</span><br><span> TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x79, Fn=2654167 (17,25,9)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=1 USF=1</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x7a Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=1 USF=1</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x7a (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -6253,11 +6230,8 @@</span><br><span> TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7a, Fn=2654167 (17,25,9)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=2 USF=2</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x7b Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=2 USF=2</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x7b (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -6278,11 +6252,8 @@</span><br><span> TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7b, Fn=2654167 (17,25,9)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=3 USF=3</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x7c Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=3 USF=3</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x7c (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -6303,11 +6274,8 @@</span><br><span> TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7c, Fn=2654167 (17,25,9)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=4 USF=4</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x7d Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=4 USF=4</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x7d (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -6328,11 +6296,8 @@</span><br><span> TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7d, Fn=2654167 (17,25,9)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=5 USF=5</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x7e Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=5 USF=5</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x7e (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -6353,11 +6318,8 @@</span><br><span> TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7e, Fn=2654167 (17,25,9)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=6 USF=6</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x7f Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=6 USF=6</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x7f (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -6371,21 +6333,22 @@</span><br><span> - Skipping TS 6, because not enabled</span><br><span> - Skipping TS 7, because no USF available</span><br><span> [UL] algo A <single> (suggested TRX: -1): failed to allocate a TS, no USF available</span><br><span style="color: hsl(0, 100%, 40%);">-No PDCH resource sending Immediate Assignment Uplink (AGCH) reject</span><br><span style="color: hsl(120, 100%, 40%);">+No PDCH resource for Uplink TBF</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment Reject on AGCH</span><br><span> === end test_immediate_assign_rej_multi_block ===</span><br><span> Destroying MS object, TLLI = 0x00000000</span><br><span> === start test_immediate_assign_rej_single_block ===</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x70 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x70 (8 bit) Fn=2654167 qta=31</span><br><span> MS requests single block allocation</span><br><span> No PDCH available.</span><br><span style="color: hsl(0, 100%, 40%);">-No PDCH resource for single block allocation.sending Immediate Assignment Uplink (AGCH) reject</span><br><span style="color: hsl(120, 100%, 40%);">+No PDCH resource for single block allocation: rc=-22</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment Reject on AGCH</span><br><span> === end test_immediate_assign_rej_single_block ===</span><br><span> === start test_tbf_egprs_two_phase_puan ===</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31</span><br><span> MS requests single block allocation</span><br><span style="color: hsl(0, 100%, 40%);">-RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270</span><br><span style="color: hsl(0, 100%, 40%);">-TX: Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span style="color: hsl(120, 100%, 40%);">+Allocated a single block at SBFn=2654270 TRX=0 TS=7</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7</span><br><span> Searching for first unallocated TFI: TRX=0</span><br><span> Found TFI=0.</span><br><span> +++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++</span><br><span>@@ -7815,7 +7778,7 @@</span><br><span> packet reject: 40 84 7f f7 6e e6 41 4b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b </span><br><span> === end test_packet_access_rej_epdan ===</span><br><span> === start test_packet_access_rej_prr ===</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x78 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x78 (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -7836,11 +7799,8 @@</span><br><span> TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x78, Fn=2654167 (17,25,9)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=0 USF=0</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x79 Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=0 USF=0</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x79 (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -7861,11 +7821,8 @@</span><br><span> TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x79, Fn=2654167 (17,25,9)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=1 USF=1</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x7a Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=1 USF=1</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x7a (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -7886,11 +7843,8 @@</span><br><span> TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7a, Fn=2654167 (17,25,9)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=2 USF=2</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x7b Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=2 USF=2</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x7b (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -7911,11 +7865,8 @@</span><br><span> TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7b, Fn=2654167 (17,25,9)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=3 USF=3</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x7c Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=3 USF=3</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x7c (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -7936,11 +7887,8 @@</span><br><span> TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7c, Fn=2654167 (17,25,9)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=4 USF=4</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x7d Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=4 USF=4</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x7d (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -7961,11 +7909,8 @@</span><br><span> TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7d, Fn=2654167 (17,25,9)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=5 USF=5</span><br><span style="color: hsl(0, 100%, 40%);">-MS requests UL TBF on RACH, so we provide one: ra=0x7e Fn=2654167 qta=31 is_11bit=0:</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=5 USF=5</span><br><span style="color: hsl(120, 100%, 40%);">+MS requests Uplink resource on CCCH/RACH: ra=0x7e (8 bit) Fn=2654167 qta=31</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span> ********** UL-TBF starts here **********</span><br><span> Allocating UL TBF: MS_CLASS=0/0</span><br><span>@@ -7986,10 +7931,7 @@</span><br><span> TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW</span><br><span> TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]</span><br><span> TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7e, Fn=2654167 (17,25,9)</span><br><span style="color: hsl(0, 100%, 40%);">-TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)</span><br><span style="color: hsl(0, 100%, 40%);">- - TRX=0 (0) TS=7 TA=7 TSC=0 TFI=6 USF=6</span><br><span style="color: hsl(120, 100%, 40%);">+Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=6 USF=6</span><br><span> +++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++</span><br><span> ------------------------- RX : Uplink Control Block -------------------------</span><br><span> Creating MS object, TLLI = 0x00000000</span><br><span></span><br></pre><p>To view, visit <a href="https://gerrit.osmocom.org/c/osmo-pcu/+/18386">change 18386</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://gerrit.osmocom.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://gerrit.osmocom.org/c/osmo-pcu/+/18386"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: osmo-pcu </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I5fe7e0f51bf5c9eac073935cc4f4edd667c67c6e </div>
<div style="display:none"> Gerrit-Change-Number: 18386 </div>
<div style="display:none"> Gerrit-PatchSet: 7 </div>
<div style="display:none"> Gerrit-Owner: Vadim Yanitskiy <vyanitskiy@sysmocom.de> </div>
<div style="display:none"> Gerrit-Reviewer: Jenkins Builder </div>
<div style="display:none"> Gerrit-Reviewer: Vadim Yanitskiy <vyanitskiy@sysmocom.de> </div>
<div style="display:none"> Gerrit-Reviewer: laforge <laforge@osmocom.org> </div>
<div style="display:none"> Gerrit-Reviewer: pespin <pespin@sysmocom.de> </div>
<div style="display:none"> Gerrit-MessageType: merged </div>