<p>laforge has uploaded this change for <strong>review</strong>.</p><p><a href="https://gerrit.osmocom.org/c/osmo-ccid-firmware/+/15723">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">WIP: Add card_uart driver for ASF4 USART<br><br>Change-Id: I9a141e9d2125fbfc992ad51aa4b11a39ee186607<br>---<br>M ccid_common/ccid_slot_fsm.c<br>M ccid_common/cuart.h<br>A sysmoOCTSIM/cuart_driver_asf4_usart_async.c<br>3 files changed, 252 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://gerrit.osmocom.org:29418/osmo-ccid-firmware refs/changes/23/15723/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/ccid_common/ccid_slot_fsm.c b/ccid_common/ccid_slot_fsm.c</span><br><span>index 06c14f1..76279ec 100644</span><br><span>--- a/ccid_common/ccid_slot_fsm.c</span><br><span>+++ b/ccid_common/ccid_slot_fsm.c</span><br><span>@@ -30,12 +30,18 @@</span><br><span> </span><br><span> static struct iso_fsm_slot_instance g_si;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-struct iso_fsm_slot *ccid_slot2iso_fsm_slot(struct ccid_slot *cs)</span><br><span style="color: hsl(120, 100%, 40%);">+static struct iso_fsm_slot *ccid_slot2iso_fsm_slot(struct ccid_slot *cs)</span><br><span> {</span><br><span> OSMO_ASSERT(cs->slot_nr < ARRAY_SIZE(g_si.slot));</span><br><span> return &g_si.slot[cs->slot_nr];</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+struct card_uart *cuart4slot_nr(uint8_t slot_nr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ OSMO_ASSERT(slot_nr < ARRAY_SIZE(g_si.slot));</span><br><span style="color: hsl(120, 100%, 40%);">+ return g_si.slot[slot_nr].cuart;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> static const uint8_t sysmousim_sjs1_atr[] = {</span><br><span> 0x3B, 0x9F, 0x96, 0x80, 0x1F, 0xC7, 0x80, 0x31,</span><br><span> 0xA0, 0x73, 0xBE, 0x21, 0x13, 0x67, 0x43, 0x20,</span><br><span>diff --git a/ccid_common/cuart.h b/ccid_common/cuart.h</span><br><span>index 790c277..cadd65f 100644</span><br><span>--- a/ccid_common/cuart.h</span><br><span>+++ b/ccid_common/cuart.h</span><br><span>@@ -6,6 +6,8 @@</span><br><span> #include <osmocom/core/select.h></span><br><span> #include "utils_ringbuffer.h"</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+struct usart_async_descriptor;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> enum card_uart_event {</span><br><span> /* a single byte was received, it's present at the (uint8_t *) data location */</span><br><span> CUART_E_RX_SINGLE,</span><br><span>@@ -83,6 +85,10 @@</span><br><span> struct osmo_fd ofd;</span><br><span> unsigned int baudrate;</span><br><span> } tty;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct {</span><br><span style="color: hsl(120, 100%, 40%);">+ struct usart_async_descriptor *usa_pd;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint8_t slot_nr;</span><br><span style="color: hsl(120, 100%, 40%);">+ } asf4;</span><br><span> } u;</span><br><span> };</span><br><span> </span><br><span>diff --git a/sysmoOCTSIM/cuart_driver_asf4_usart_async.c b/sysmoOCTSIM/cuart_driver_asf4_usart_async.c</span><br><span>new file mode 100644</span><br><span>index 0000000..299a2df</span><br><span>--- /dev/null</span><br><span>+++ b/sysmoOCTSIM/cuart_driver_asf4_usart_async.c</span><br><span>@@ -0,0 +1,239 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/* Card (ICC) UART driver for the Atmel ASF4 asynchronous USART */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <errno.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <osmocom/core/linuxlist.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <osmocom/core/utils.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <hal_usart_async.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <utils_ringbuffer.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include "driver_init.h"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include "ncn8025.h"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include "cuart.h"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static struct usart_async_descriptor* SIM_peripheral_descriptors[] = {&SIM0, &SIM1, &SIM2, &SIM3, &SIM4, &SIM5, &SIM6, NULL};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+extern struct card_uart *cuart4slot_nr(uint8_t slot_nr);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/***********************************************************************</span><br><span style="color: hsl(120, 100%, 40%);">+ * low-level helper routines</span><br><span style="color: hsl(120, 100%, 40%);">+ ***********************************************************************/</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void _SIM_rx_cb(const struct usart_async_descriptor *const io_descr, uint8_t slot_nr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct card_uart *cuart = cuart4slot_nr(slot_nr);</span><br><span style="color: hsl(120, 100%, 40%);">+ int rc;</span><br><span style="color: hsl(120, 100%, 40%);">+ OSMO_ASSERT(cuart);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (cuart->rx_threshold == 1) {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* bypass ringbuffer and report byte directly */</span><br><span style="color: hsl(120, 100%, 40%);">+ uint8_t rx[1];</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = io_read((struct io_descriptor * const)&io_descr->io, rx, sizeof(rx));</span><br><span style="color: hsl(120, 100%, 40%);">+ OSMO_ASSERT(rc == sizeof(rx));</span><br><span style="color: hsl(120, 100%, 40%);">+ card_uart_notification(cuart, CUART_E_RX_SINGLE, rx);</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* go via ringbuffer and notify only after threshold */</span><br><span style="color: hsl(120, 100%, 40%);">+ if (ringbuffer_num(&io_descr->rx) >= cuart->rx_threshold)</span><br><span style="color: hsl(120, 100%, 40%);">+ card_uart_notification(cuart, CUART_E_RX_COMPLETE, NULL);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void _SIM_tx_cb(const struct usart_async_descriptor *const io_descr, uint8_t slot_nr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct card_uart *cuart = cuart4slot_nr(slot_nr);</span><br><span style="color: hsl(120, 100%, 40%);">+ OSMO_ASSERT(cuart);</span><br><span style="color: hsl(120, 100%, 40%);">+ card_uart_notification(cuart, CUART_E_TX_COMPLETE, io_descr->tx_buffer);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* the below ugli-ness is required as the usart_async_descriptor doesn't have</span><br><span style="color: hsl(120, 100%, 40%);">+ * some kind of 'private' member that could provide the call-back anty kind of</span><br><span style="color: hsl(120, 100%, 40%);">+ * context */</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM0_rx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_rx_cb(io_descr, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM1_rx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_rx_cb(io_descr, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM2_rx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_rx_cb(io_descr, 2);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM3_rx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_rx_cb(io_descr, 3);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM4_rx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_rx_cb(io_descr, 4);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM5_rx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_rx_cb(io_descr, 5);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM6_rx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_rx_cb(io_descr, 6);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM7_rx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_rx_cb(io_descr, 7);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static usart_cb_t SIM_rx_cb[8] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ SIM0_rx_cb, SIM1_rx_cb, SIM2_rx_cb, SIM3_rx_cb,</span><br><span style="color: hsl(120, 100%, 40%);">+ SIM4_rx_cb, SIM5_rx_cb, SIM6_rx_cb, SIM7_rx_cb,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM0_tx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_tx_cb(io_descr, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM1_tx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_tx_cb(io_descr, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM2_tx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_tx_cb(io_descr, 2);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM3_tx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_tx_cb(io_descr, 3);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM4_tx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_tx_cb(io_descr, 4);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM5_tx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_tx_cb(io_descr, 5);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM6_tx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_tx_cb(io_descr, 6);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static void SIM7_tx_cb(const struct usart_async_descriptor *const io_descr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ _SIM_tx_cb(io_descr, 7);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+static usart_cb_t SIM_tx_cb[8] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ SIM0_tx_cb, SIM1_tx_cb, SIM2_tx_cb, SIM3_tx_cb,</span><br><span style="color: hsl(120, 100%, 40%);">+ SIM4_tx_cb, SIM5_tx_cb, SIM6_tx_cb, SIM7_tx_cb,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/***********************************************************************</span><br><span style="color: hsl(120, 100%, 40%);">+ * Interface with card_uart (cuart) core</span><br><span style="color: hsl(120, 100%, 40%);">+ ***********************************************************************/</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* forward-declaration */</span><br><span style="color: hsl(120, 100%, 40%);">+static struct card_uart_driver asf4_usart_driver;</span><br><span style="color: hsl(120, 100%, 40%);">+static int asf4_usart_close(struct card_uart *cuart);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static int asf4_usart_open(struct card_uart *cuart, const char *device_name)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct usart_async_descriptor *usa_pd;</span><br><span style="color: hsl(120, 100%, 40%);">+ int slot_nr = atoi(device_name);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (slot_nr >= ARRAY_SIZE(SIM_peripheral_descriptors))</span><br><span style="color: hsl(120, 100%, 40%);">+ return -ENODEV;</span><br><span style="color: hsl(120, 100%, 40%);">+ usa_pd = SIM_peripheral_descriptors[slot_nr];</span><br><span style="color: hsl(120, 100%, 40%);">+ if (!usa_pd)</span><br><span style="color: hsl(120, 100%, 40%);">+ return -ENODEV;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ cuart->u.asf4.usa_pd = usa_pd;</span><br><span style="color: hsl(120, 100%, 40%);">+ cuart->u.asf4.slot_nr = slot_nr;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ usart_async_register_callback(usa_pd, USART_ASYNC_RXC_CB, SIM_rx_cb[slot_nr]);</span><br><span style="color: hsl(120, 100%, 40%);">+ usart_async_register_callback(usa_pd, USART_ASYNC_TXC_CB, SIM_tx_cb[slot_nr]);</span><br><span style="color: hsl(120, 100%, 40%);">+ usart_async_enable(usa_pd);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static int asf4_usart_close(struct card_uart *cuart)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct usart_async_descriptor *usa_pd = cuart->u.asf4.usa_pd;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ OSMO_ASSERT(cuart->driver == &asf4_usart_driver);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ usart_async_disable(usa_pd);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static int asf4_usart_async_tx(struct card_uart *cuart, const uint8_t *data, size_t len, bool rx_after)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct usart_async_descriptor *usa_pd = cuart->u.asf4.usa_pd;</span><br><span style="color: hsl(120, 100%, 40%);">+ int rc;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ OSMO_ASSERT(cuart->driver == &asf4_usart_driver);</span><br><span style="color: hsl(120, 100%, 40%);">+ OSMO_ASSERT(usart_async_is_tx_empty(usa_pd));</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ rc = io_write(&usa_pd->io, data, len);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (rc < 0)</span><br><span style="color: hsl(120, 100%, 40%);">+ return rc;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ cuart->tx_busy = true;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return rc;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static int asf4_usart_async_rx(struct card_uart *cuart, uint8_t *data, size_t len)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct usart_async_descriptor *usa_pd = cuart->u.asf4.usa_pd;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ OSMO_ASSERT(cuart->driver == &asf4_usart_driver);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return io_read(&usa_pd->io, data, len);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static int asf4_usart_ctrl(struct card_uart *cuart, enum card_uart_ctl ctl, bool enable)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct ncn8025_settings settings;</span><br><span style="color: hsl(120, 100%, 40%);">+ Sercom *sercom = cuart->u.asf4.usa_pd->device.hw;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (ctl) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case CUART_CTL_RX:</span><br><span style="color: hsl(120, 100%, 40%);">+ if (enable)</span><br><span style="color: hsl(120, 100%, 40%);">+ sercom->USART.CTRLB.bit.RXEN = 1;</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ sercom->USART.CTRLB.bit.RXEN = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case CUART_CTL_RST:</span><br><span style="color: hsl(120, 100%, 40%);">+ ncn8025_get(cuart->u.asf4.slot_nr, &settings);</span><br><span style="color: hsl(120, 100%, 40%);">+ settings.rstin = enable;</span><br><span style="color: hsl(120, 100%, 40%);">+ ncn8025_set(cuart->u.asf4.slot_nr, &settings);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case CUART_CTL_POWER:</span><br><span style="color: hsl(120, 100%, 40%);">+ ncn8025_get(cuart->u.asf4.slot_nr, &settings);</span><br><span style="color: hsl(120, 100%, 40%);">+ settings.cmdvcc = enable;</span><br><span style="color: hsl(120, 100%, 40%);">+ ncn8025_set(cuart->u.asf4.slot_nr, &settings);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case CUART_CTL_CLOCK:</span><br><span style="color: hsl(120, 100%, 40%);">+ /* FIXME */</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ return -EINVAL;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static const struct card_uart_ops asf4_usart_ops = {</span><br><span style="color: hsl(120, 100%, 40%);">+ .open = asf4_usart_open,</span><br><span style="color: hsl(120, 100%, 40%);">+ .close = asf4_usart_close,</span><br><span style="color: hsl(120, 100%, 40%);">+ .async_tx = asf4_usart_async_tx,</span><br><span style="color: hsl(120, 100%, 40%);">+ .async_rx = asf4_usart_async_rx,</span><br><span style="color: hsl(120, 100%, 40%);">+ .ctrl = asf4_usart_ctrl,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static struct card_uart_driver asf4_usart_driver = {</span><br><span style="color: hsl(120, 100%, 40%);">+ .name = "asf4",</span><br><span style="color: hsl(120, 100%, 40%);">+ .ops = &asf4_usart_ops,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static __attribute__((constructor)) void on_dso_load_cuart_asf4(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ card_uart_driver_register(&asf4_usart_driver);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span></span><br></pre><p>To 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<div style="display:none"> Gerrit-Project: osmo-ccid-firmware </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: I9a141e9d2125fbfc992ad51aa4b11a39ee186607 </div>
<div style="display:none"> Gerrit-Change-Number: 15723 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: laforge <laforge@osmocom.org> </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>