<p>Kévin Redon has uploaded this change for <strong>review</strong>.</p><p><a href="https://gerrit.osmocom.org/13680">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">change SERCOM clock to 3.3 MHz<br><br>we use the SERCOM peripheral for USART (in 7816 mode SIM card<br>communication) in synchronous mode (TX and RX clock are the same).<br>in this mode only the 8 least significant bits of the BAUD register<br>are used (see TRM 33.6.2.3 Clock Generation – Baud-Rate Generator).<br>When the SERCOM is clocked at 100 MHz the minimum resulting baud<br>rate would be 100E6 / (2 * 255 + 1) = 195694 bps.<br>clocking SERCOM at 3.33 MHz also to have a baud rate of 6720 bps<br>(~ 3.33E6 / (2 * 247 + 1)), used after reset to read the ATR.<br><br>Change-Id: Id60322e092a6652a89821fc737d5336d79a1420c<br>---<br>M sysmoOCTSIM/config/hpl_gclk_config.h<br>M sysmoOCTSIM/config/peripheral_clk_config.h<br>2 files changed, 12 insertions(+), 12 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://gerrit.osmocom.org:29418/osmo-ccid-firmware refs/changes/80/13680/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/sysmoOCTSIM/config/hpl_gclk_config.h b/sysmoOCTSIM/config/hpl_gclk_config.h</span><br><span>index 6b7586c..71c26e1 100644</span><br><span>--- a/sysmoOCTSIM/config/hpl_gclk_config.h</span><br><span>+++ b/sysmoOCTSIM/config/hpl_gclk_config.h</span><br><span>@@ -226,7 +226,7 @@</span><br><span> //<o> Generic clock generator 2 division <0x0000-0xFFFF></span><br><span> // <id> gclk_gen_2_div</span><br><span> #ifndef CONF_GCLK_GEN_2_DIV</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_GEN_2_DIV 1</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_GEN_2_DIV 30</span><br><span> #endif</span><br><span> // </h></span><br><span> // </e></span><br><span>@@ -311,7 +311,7 @@</span><br><span> // <i> Indicates whether generic clock 4 configuration is enabled or not</span><br><span> // <id> enable_gclk_gen_4</span><br><span> #ifndef CONF_GCLK_GENERATOR_4_CONFIG</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_GENERATOR_4_CONFIG 0</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_GENERATOR_4_CONFIG 1</span><br><span> #endif</span><br><span> </span><br><span> // <h> Generic Clock Generator Control</span><br><span>@@ -328,7 +328,7 @@</span><br><span> // <i> This defines the clock source for generic clock generator 4</span><br><span> // <id> gclk_gen_4_oscillator</span><br><span> #ifndef CONF_GCLK_GEN_4_SOURCE</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_GEN_4_SOURCE GCLK_GENCTRL_SRC_XOSC1</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_GEN_4_SOURCE GCLK_GENCTRL_SRC_DPLL1</span><br><span> #endif</span><br><span> </span><br><span> // <q> Run in Standby</span><br><span>@@ -370,7 +370,7 @@</span><br><span> // <i> Indicates whether Generic Clock Generator Enable is enabled or not</span><br><span> // <id> gclk_arch_gen_4_enable</span><br><span> #ifndef CONF_GCLK_GEN_4_GENEN</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_GEN_4_GENEN 0</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_GEN_4_GENEN 1</span><br><span> #endif</span><br><span> // </h></span><br><span> </span><br><span>diff --git a/sysmoOCTSIM/config/peripheral_clk_config.h b/sysmoOCTSIM/config/peripheral_clk_config.h</span><br><span>index 91c5c86..4bff6ff 100644</span><br><span>--- a/sysmoOCTSIM/config/peripheral_clk_config.h</span><br><span>+++ b/sysmoOCTSIM/config/peripheral_clk_config.h</span><br><span>@@ -81,7 +81,7 @@</span><br><span>  * \brief SERCOM0's Core Clock frequency</span><br><span>  */</span><br><span> #ifndef CONF_GCLK_SERCOM0_CORE_FREQUENCY</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_SERCOM0_CORE_FREQUENCY 100000000</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_SERCOM0_CORE_FREQUENCY 3333333</span><br><span> #endif</span><br><span> </span><br><span> /**</span><br><span>@@ -161,7 +161,7 @@</span><br><span>  * \brief SERCOM1's Core Clock frequency</span><br><span>  */</span><br><span> #ifndef CONF_GCLK_SERCOM1_CORE_FREQUENCY</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_SERCOM1_CORE_FREQUENCY 100000000</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_SERCOM1_CORE_FREQUENCY 3333333</span><br><span> #endif</span><br><span> </span><br><span> /**</span><br><span>@@ -241,7 +241,7 @@</span><br><span>  * \brief SERCOM2's Core Clock frequency</span><br><span>  */</span><br><span> #ifndef CONF_GCLK_SERCOM2_CORE_FREQUENCY</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_SERCOM2_CORE_FREQUENCY 100000000</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_SERCOM2_CORE_FREQUENCY 3333333</span><br><span> #endif</span><br><span> </span><br><span> /**</span><br><span>@@ -321,7 +321,7 @@</span><br><span>  * \brief SERCOM3's Core Clock frequency</span><br><span>  */</span><br><span> #ifndef CONF_GCLK_SERCOM3_CORE_FREQUENCY</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_SERCOM3_CORE_FREQUENCY 100000000</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_SERCOM3_CORE_FREQUENCY 3333333</span><br><span> #endif</span><br><span> </span><br><span> /**</span><br><span>@@ -401,7 +401,7 @@</span><br><span>  * \brief SERCOM4's Core Clock frequency</span><br><span>  */</span><br><span> #ifndef CONF_GCLK_SERCOM4_CORE_FREQUENCY</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_SERCOM4_CORE_FREQUENCY 100000000</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_SERCOM4_CORE_FREQUENCY 3333333</span><br><span> #endif</span><br><span> </span><br><span> /**</span><br><span>@@ -481,7 +481,7 @@</span><br><span>  * \brief SERCOM5's Core Clock frequency</span><br><span>  */</span><br><span> #ifndef CONF_GCLK_SERCOM5_CORE_FREQUENCY</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_SERCOM5_CORE_FREQUENCY 100000000</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_SERCOM5_CORE_FREQUENCY 3333333</span><br><span> #endif</span><br><span> </span><br><span> /**</span><br><span>@@ -561,7 +561,7 @@</span><br><span>  * \brief SERCOM6's Core Clock frequency</span><br><span>  */</span><br><span> #ifndef CONF_GCLK_SERCOM6_CORE_FREQUENCY</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_SERCOM6_CORE_FREQUENCY 100000000</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_SERCOM6_CORE_FREQUENCY 3333333</span><br><span> #endif</span><br><span> </span><br><span> /**</span><br><span>@@ -601,7 +601,7 @@</span><br><span> </span><br><span> // <i> Select the clock source for CORE.</span><br><span> #ifndef CONF_GCLK_SERCOM7_CORE_SRC</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_SERCOM7_CORE_SRC GCLK_PCHCTRL_GEN_GCLK2_Val</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_SERCOM7_CORE_SRC GCLK_PCHCTRL_GEN_GCLK4_Val</span><br><span> #endif</span><br><span> </span><br><span> // <y> Slow Clock Source</span><br><span></span><br></pre><p>To view, visit <a href="https://gerrit.osmocom.org/13680">change 13680</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://gerrit.osmocom.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://gerrit.osmocom.org/13680"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: osmo-ccid-firmware </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Id60322e092a6652a89821fc737d5336d79a1420c </div>
<div style="display:none"> Gerrit-Change-Number: 13680 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Kévin Redon <kredon@sysmocom.de> </div>