<p>Kévin Redon has uploaded this change for <strong>review</strong>.</p><p><a href="https://gerrit.osmocom.org/12809">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">add 20 MHz clock output<br><br>use GCLK5 to output 20 MHz clock on PA11/GCLK_IO[5] for SIM cards<br>clock.<br>this can be further divided by the NCN8025 before reaching the SIM.<br><br>Change-Id: I2c0d6a31ec63a87e04ef4e3afbedce3a221324cc<br>---<br>M sysmoOCTSIM/atmel_start_config.atstart<br>M sysmoOCTSIM/config/hpl_gclk_config.h<br>2 files changed, 10 insertions(+), 10 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://gerrit.osmocom.org:29418/osmo-ccid-firmware refs/changes/09/12809/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/sysmoOCTSIM/atmel_start_config.atstart b/sysmoOCTSIM/atmel_start_config.atstart</span><br><span>index 09c0b2d..5c7cc2c 100644</span><br><span>--- a/sysmoOCTSIM/atmel_start_config.atstart</span><br><span>+++ b/sysmoOCTSIM/atmel_start_config.atstart</span><br><span>@@ -648,7 +648,7 @@</span><br><span> enable_gclk_gen_2: true</span><br><span> enable_gclk_gen_3: true</span><br><span> enable_gclk_gen_4: false</span><br><span style="color: hsl(0, 100%, 40%);">- enable_gclk_gen_5: false</span><br><span style="color: hsl(120, 100%, 40%);">+ enable_gclk_gen_5: true</span><br><span> enable_gclk_gen_6: false</span><br><span> enable_gclk_gen_7: false</span><br><span> enable_gclk_gen_8: false</span><br><span>@@ -688,9 +688,9 @@</span><br><span> gclk_arch_gen_4_oe: false</span><br><span> gclk_arch_gen_4_oov: false</span><br><span> gclk_arch_gen_4_runstdby: false</span><br><span style="color: hsl(0, 100%, 40%);">- gclk_arch_gen_5_enable: false</span><br><span style="color: hsl(120, 100%, 40%);">+ gclk_arch_gen_5_enable: true</span><br><span> gclk_arch_gen_5_idc: false</span><br><span style="color: hsl(0, 100%, 40%);">- gclk_arch_gen_5_oe: false</span><br><span style="color: hsl(120, 100%, 40%);">+ gclk_arch_gen_5_oe: true</span><br><span> gclk_arch_gen_5_oov: false</span><br><span> gclk_arch_gen_5_runstdby: false</span><br><span> gclk_arch_gen_6_enable: false</span><br><span>@@ -734,9 +734,9 @@</span><br><span> gclk_gen_4_div: 1</span><br><span> gclk_gen_4_div_sel: false</span><br><span> gclk_gen_4_oscillator: External Crystal Oscillator 8-48MHz (XOSC1)</span><br><span style="color: hsl(0, 100%, 40%);">- gclk_gen_5_div: 1</span><br><span style="color: hsl(120, 100%, 40%);">+ gclk_gen_5_div: 5</span><br><span> gclk_gen_5_div_sel: false</span><br><span style="color: hsl(0, 100%, 40%);">- gclk_gen_5_oscillator: External Crystal Oscillator 8-48MHz (XOSC1)</span><br><span style="color: hsl(120, 100%, 40%);">+ gclk_gen_5_oscillator: Digital Phase Locked Loop (DPLL1)</span><br><span> gclk_gen_6_div: 1</span><br><span> gclk_gen_6_div_sel: false</span><br><span> gclk_gen_6_oscillator: External Crystal Oscillator 8-48MHz (XOSC1)</span><br><span>diff --git a/sysmoOCTSIM/config/hpl_gclk_config.h b/sysmoOCTSIM/config/hpl_gclk_config.h</span><br><span>index d16af6f..6b7586c 100644</span><br><span>--- a/sysmoOCTSIM/config/hpl_gclk_config.h</span><br><span>+++ b/sysmoOCTSIM/config/hpl_gclk_config.h</span><br><span>@@ -387,7 +387,7 @@</span><br><span> // <i> Indicates whether generic clock 5 configuration is enabled or not</span><br><span> // <id> enable_gclk_gen_5</span><br><span> #ifndef CONF_GCLK_GENERATOR_5_CONFIG</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_GENERATOR_5_CONFIG 0</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_GENERATOR_5_CONFIG 1</span><br><span> #endif</span><br><span> </span><br><span> // <h> Generic Clock Generator Control</span><br><span>@@ -404,7 +404,7 @@</span><br><span> // <i> This defines the clock source for generic clock generator 5</span><br><span> // <id> gclk_gen_5_oscillator</span><br><span> #ifndef CONF_GCLK_GEN_5_SOURCE</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_GEN_5_SOURCE GCLK_GENCTRL_SRC_XOSC1</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_GEN_5_SOURCE GCLK_GENCTRL_SRC_DPLL1</span><br><span> #endif</span><br><span> </span><br><span> // <q> Run in Standby</span><br><span>@@ -425,7 +425,7 @@</span><br><span> // <i> Indicates whether Output Enable is enabled or not</span><br><span> // <id> gclk_arch_gen_5_oe</span><br><span> #ifndef CONF_GCLK_GEN_5_OE</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_GEN_5_OE 0</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_GEN_5_OE 1</span><br><span> #endif</span><br><span> </span><br><span> // <q> Output Off Value</span><br><span>@@ -446,7 +446,7 @@</span><br><span> // <i> Indicates whether Generic Clock Generator Enable is enabled or not</span><br><span> // <id> gclk_arch_gen_5_enable</span><br><span> #ifndef CONF_GCLK_GEN_5_GENEN</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_GEN_5_GENEN 0</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_GEN_5_GENEN 1</span><br><span> #endif</span><br><span> // </h></span><br><span> </span><br><span>@@ -454,7 +454,7 @@</span><br><span> //<o> Generic clock generator 5 division <0x0000-0xFFFF></span><br><span> // <id> gclk_gen_5_div</span><br><span> #ifndef CONF_GCLK_GEN_5_DIV</span><br><span style="color: hsl(0, 100%, 40%);">-#define CONF_GCLK_GEN_5_DIV 1</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONF_GCLK_GEN_5_DIV 5</span><br><span> #endif</span><br><span> // </h></span><br><span> // </e></span><br><span></span><br></pre><p>To view, visit <a href="https://gerrit.osmocom.org/12809">change 12809</a>. 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<div style="display:none"> Gerrit-Project: osmo-ccid-firmware </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I2c0d6a31ec63a87e04ef4e3afbedce3a221324cc </div>
<div style="display:none"> Gerrit-Change-Number: 12809 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Kévin Redon <kredon@sysmocom.de> </div>