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Max gerrit-no-reply at lists.osmocom.orgHello Harald Welte, Jenkins Builder, I'd like you to reexamine a change. Please visit https://gerrit.osmocom.org/4072 to look at the new patch set (#3). Add multislot classes from latest spec The table B.1 is copy-pasted from 3GPP TS 45.002 and reformatted via Emacs macros into C struct to avoid typos. The test output expanded accordingly. Note: classes 35-45 which need TA offset are not properly supported yet. This can be extended once we have such devices available for tests. Change-Id: I1ef2eb99c517f25e7d1e71b985a3e0eb3879eb2c Related: OS#2282 --- M src/gprs_rlcmac_ts_alloc.cpp M src/mslot_class.c M src/mslot_class.h M tests/alloc/MslotTest.ok 4 files changed, 651 insertions(+), 47 deletions(-) git pull ssh://gerrit.osmocom.org:29418/osmo-pcu refs/changes/72/4072/3 diff --git a/src/gprs_rlcmac_ts_alloc.cpp b/src/gprs_rlcmac_ts_alloc.cpp index 471b601..b5edf05 100644 --- a/src/gprs_rlcmac_ts_alloc.cpp +++ b/src/gprs_rlcmac_ts_alloc.cpp @@ -469,8 +469,12 @@ Sum = mslot_class_get_sum(mslot_class); Tta = mslot_class_get_ta(mslot_class); Ttb = mslot_class_get_tb(mslot_class); - Tra = mslot_class_get_ra(mslot_class); - Trb = mslot_class_get_rb(mslot_class); + + /* FIXME: use actual TA offset for computation - make sure to adjust "1 + MS_TO" accordingly + see also "Offset required" bit in 3GPP TS 24.008 §10.5.1.7 */ + Tra = mslot_class_get_ra(mslot_class, 0); + Trb = mslot_class_get_rb(mslot_class, 0); + Type = mslot_class_get_type(mslot_class); if (Tx == MS_NA) { diff --git a/src/mslot_class.c b/src/mslot_class.c index 6d7c09d..936afb3 100644 --- a/src/mslot_class.c +++ b/src/mslot_class.c @@ -27,7 +27,7 @@ #include <errno.h> -/* 3GPP TS 05.02 Annex B.1 */ +/* 3GPP TS 45.002 Annex B Table B.1 */ struct gprs_ms_multislot_class { uint8_t rx, tx, sum; /* Maximum Number of Slots: RX, Tx, Sum Rx+Tx */ @@ -35,7 +35,7 @@ uint8_t type; /* Type of Mobile */ }; -static const struct gprs_ms_multislot_class gprs_ms_multislot_class[32] = { +static const struct gprs_ms_multislot_class gprs_ms_multislot_class[] = { /* M-S Class | Max # of slots | Min # of slots | Type */ /* | Rx Tx Sum | Tta Ttb Tra Trb | */ /* N/A */ { MS_NA, MS_NA, MS_NA, MS_NA, MS_NA, MS_NA, MS_NA, MS_NA }, @@ -68,8 +68,22 @@ /* 27 */ { 8, 4, MS_NA, 2, MS_B, 2, MS_C, 1 }, /* 28 */ { 8, 6, MS_NA, 2, MS_B, 2, MS_C, 1 }, /* 29 */ { 8, 8, MS_NA, 2, MS_B, 2, MS_C, 1 }, -/* N/A */ { MS_NA,MS_NA, MS_NA, MS_NA, MS_NA, MS_NA, MS_NA, MS_NA }, -/* N/A */ { MS_NA,MS_NA, MS_NA, MS_NA, MS_NA, MS_NA, MS_NA, MS_NA }, + /* 30 */ { 5, 1, 6, 2, 1, 1, 1, 1 }, + /* 31 */ { 5, 2, 6, 2, 1, 1, 1, 1 }, + /* 32 */ { 5, 3, 6, 2, 1, 1, 1, 1 }, + /* 33 */ { 5, 4, 6, 2, 1, 1, 1, 1 }, + /* 34 */ { 5, 5, 6, 2, 1, 1, 1, 1 }, + /* 35 */ { 5, 1, 6, 2, 1, MS_TO, 1, 1 }, + /* 36 */ { 5, 2, 6, 2, 1, MS_TO, 1, 1 }, + /* 37 */ { 5, 3, 6, 2, 1, MS_TO, 1, 1 }, + /* 38 */ { 5, 4, 6, 2, 1, MS_TO, 1, 1 }, + /* 39 */ { 5, 5, 6, 2, 1, MS_TO, 1, 1 }, + /* 40 */ { 6, 1, 7, 1, 1, 1, MS_TO, 1 }, + /* 41 */ { 6, 2, 7, 1, 1, 1, MS_TO, 1 }, + /* 42 */ { 6, 3, 7, 1, 1, 1, MS_TO, 1 }, + /* 43 */ { 6, 4, 7, 1, 1, 1, MS_TO, 1 }, + /* 44 */ { 6, 5, 7, 1, 1, 1, MS_TO, 1 }, + /* 45 */ { 6, 6, 7, 1, 1, 1, MS_TO, 1 }, }; static inline const struct gprs_ms_multislot_class *get_mslot_table(uint8_t ms_cl) @@ -104,12 +118,19 @@ } } -uint8_t mslot_class_get_ra(uint8_t ms_cl) +uint8_t mslot_class_get_ra(uint8_t ms_cl, uint8_t ta) { - return get_mslot_table(ms_cl)->ra; + const struct gprs_ms_multislot_class *t = get_mslot_table(ms_cl); + + switch (t->ra) { + case MS_TO: + return ta + 1; + default: + return t->ra; + } } -uint8_t mslot_class_get_rb(uint8_t ms_cl) +uint8_t mslot_class_get_rb(uint8_t ms_cl, uint8_t ta) { const struct gprs_ms_multislot_class *t = get_mslot_table(ms_cl); @@ -118,6 +139,8 @@ return 0; case MS_C: return 1; + case MS_TO: + return ta; default: return t->rb; } diff --git a/src/mslot_class.h b/src/mslot_class.h index f26bd64..3fa507d 100644 --- a/src/mslot_class.h +++ b/src/mslot_class.h @@ -32,14 +32,15 @@ #define MS_A 254 /* 1 with hopping, 0 without */ #define MS_B 253 /* 1 with hopping, 0 without (change Rx to Tx)*/ #define MS_C 252 /* 1 with hopping, 0 without (change Tx to Rx)*/ +#define MS_TO 251 /* 31 symbol periods (this can be provided by a TA offset, i.e. a minimum TA value) */ #define DEFAULT_MSLOT_CLASS 12 /* multislot class selection routines */ uint8_t mslot_class_get_ta(uint8_t ms_cl); uint8_t mslot_class_get_tb(uint8_t ms_cl); -uint8_t mslot_class_get_ra(uint8_t ms_cl); -uint8_t mslot_class_get_rb(uint8_t ms_cl); +uint8_t mslot_class_get_ra(uint8_t ms_cl, uint8_t ta); +uint8_t mslot_class_get_rb(uint8_t ms_cl, uint8_t ta); uint8_t mslot_class_get_tx(uint8_t ms_cl); uint8_t mslot_class_get_rx(uint8_t ms_cl); uint8_t mslot_class_get_sum(uint8_t ms_cl); diff --git a/tests/alloc/MslotTest.ok b/tests/alloc/MslotTest.ok index 0cd50c8..86526bf 100644 --- a/tests/alloc/MslotTest.ok +++ b/tests/alloc/MslotTest.ok @@ -30,7 +30,23 @@ [SEQ] multislot class 27 - UL: .......1 DL: .......1 [0] [SEQ] multislot class 28 - UL: .......1 DL: .......1 [0] [SEQ] multislot class 29 - UL: .......1 DL: .......1 [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 31 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 32 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 33 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 34 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 35 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 36 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 37 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 38 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 39 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 40 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 41 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 42 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 43 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 44 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 45 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] Enabled PDCH 1 for multislot tests... [SEQ] multislot class 0 - UL: ......11 DL: ......11 [0] [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] @@ -62,7 +78,23 @@ [SEQ] multislot class 27 - UL: ......11 DL: ......11 [0] [SEQ] multislot class 28 - UL: ......11 DL: ......11 [0] [SEQ] multislot class 29 - UL: ......11 DL: ......11 [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: .......1 DL: ......11 [0] + [SEQ] multislot class 31 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 32 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 33 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 34 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 35 - UL: .......1 DL: ......11 [0] + [SEQ] multislot class 36 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 37 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 38 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 39 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 40 - UL: .......1 DL: ......11 [0] + [SEQ] multislot class 41 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 42 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 43 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 44 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 45 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] Enabled PDCH 2 for multislot tests... [SEQ] multislot class 0 - UL: .....11. DL: .....111 [0] [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] @@ -94,7 +126,23 @@ [SEQ] multislot class 27 - UL: .....11. DL: .....111 [0] [SEQ] multislot class 28 - UL: .....11. DL: .....111 [0] [SEQ] multislot class 29 - UL: .....11. DL: .....111 [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 31 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 32 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 33 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 34 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 35 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 36 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 37 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 38 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 39 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 40 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 41 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 42 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 43 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 44 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 45 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] Enabled PDCH 3 for multislot tests... [SEQ] multislot class 0 - UL: .....1.. DL: ....1111 [0] [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] @@ -126,7 +174,23 @@ [SEQ] multislot class 27 - UL: .....1.. DL: ....1111 [0] [SEQ] multislot class 28 - UL: .....1.. DL: ....1111 [0] [SEQ] multislot class 29 - UL: .....1.. DL: ....1111 [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 31 - UL: ....11.. DL: ....1111 [0] + [SEQ] multislot class 32 - UL: ....11.. DL: ....1111 [0] + [SEQ] multislot class 33 - UL: ....11.. DL: ....1111 [0] + [SEQ] multislot class 34 - UL: ....11.. DL: ....1111 [0] + [SEQ] multislot class 35 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 36 - UL: ....11.. DL: ....1111 [0] + [SEQ] multislot class 37 - UL: ....11.. DL: ....1111 [0] + [SEQ] multislot class 38 - UL: ....11.. DL: ....1111 [0] + [SEQ] multislot class 39 - UL: ....11.. DL: ....1111 [0] + [SEQ] multislot class 40 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 41 - UL: ....11.. DL: ....1111 [0] + [SEQ] multislot class 42 - UL: ....11.. DL: ....1111 [0] + [SEQ] multislot class 43 - UL: ....11.. DL: ....1111 [0] + [SEQ] multislot class 44 - UL: ....11.. DL: ....1111 [0] + [SEQ] multislot class 45 - UL: ....11.. DL: ....1111 [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] Enabled PDCH 4 for multislot tests... [SEQ] multislot class 0 - UL: .....1.. DL: ....1111 [0] [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] @@ -158,7 +222,23 @@ [SEQ] multislot class 27 - UL: .....1.. DL: ....1111 [0] [SEQ] multislot class 28 - UL: .....1.. DL: ....1111 [0] [SEQ] multislot class 29 - UL: .....1.. DL: ....1111 [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 31 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 32 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 33 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 34 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 35 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 36 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 37 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 38 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 39 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 40 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 41 - UL: ...11... DL: ...11111 [0] + [SEQ] multislot class 42 - UL: ...11... DL: ...11111 [0] + [SEQ] multislot class 43 - UL: ...11... DL: ...11111 [0] + [SEQ] multislot class 44 - UL: ...11... DL: ...11111 [0] + [SEQ] multislot class 45 - UL: ...11... DL: ...11111 [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] Enabled PDCH 5 for multislot tests... [SEQ] multislot class 0 - UL: .....1.. DL: ....1111 [0] [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] @@ -190,7 +270,23 @@ [SEQ] multislot class 27 - UL: .....1.. DL: ....1111 [0] [SEQ] multislot class 28 - UL: .....1.. DL: ....1111 [0] [SEQ] multislot class 29 - UL: .....1.. DL: ....1111 [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 31 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 32 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 33 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 34 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 35 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 36 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 37 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 38 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 39 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 40 - UL: ...1.... DL: ..111111 [0] + [SEQ] multislot class 41 - UL: ...1.... DL: ..111111 [0] + [SEQ] multislot class 42 - UL: ...1.... DL: ..111111 [0] + [SEQ] multislot class 43 - UL: ...1.... DL: ..111111 [0] + [SEQ] multislot class 44 - UL: ...1.... DL: ..111111 [0] + [SEQ] multislot class 45 - UL: ...1.... DL: ..111111 [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] Enabled PDCH 6 for multislot tests... [SEQ] multislot class 0 - UL: .....1.. DL: ....1111 [0] [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] @@ -222,7 +318,23 @@ [SEQ] multislot class 27 - UL: .....1.. DL: ....1111 [0] [SEQ] multislot class 28 - UL: .....1.. DL: ....1111 [0] [SEQ] multislot class 29 - UL: .....1.. DL: ....1111 [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 31 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 32 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 33 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 34 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 35 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 36 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 37 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 38 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 39 - UL: ....1... DL: ...11111 [0] + [SEQ] multislot class 40 - UL: ...1.... DL: ..111111 [0] + [SEQ] multislot class 41 - UL: ...1.... DL: ..111111 [0] + [SEQ] multislot class 42 - UL: ...1.... DL: ..111111 [0] + [SEQ] multislot class 43 - UL: ...1.... DL: ..111111 [0] + [SEQ] multislot class 44 - UL: ...1.... DL: ..111111 [0] + [SEQ] multislot class 45 - UL: ...1.... DL: ..111111 [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] Enabled PDCH 7 for multislot tests... [SEQ] multislot class 0 - UL: .......1 DL: 11....11 [0] [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] @@ -254,7 +366,23 @@ [SEQ] multislot class 27 - UL: .......1 DL: 11....11 [0] [SEQ] multislot class 28 - UL: .......1 DL: 11....11 [0] [SEQ] multislot class 29 - UL: .......1 DL: 11....11 [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 31 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 32 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 33 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 34 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 35 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 36 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 37 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 38 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 39 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 40 - UL: .......1 DL: 1111..11 [0] + [SEQ] multislot class 41 - UL: .......1 DL: 1111..11 [0] + [SEQ] multislot class 42 - UL: .......1 DL: 1111..11 [0] + [SEQ] multislot class 43 - UL: .......1 DL: 1111..11 [0] + [SEQ] multislot class 44 - UL: .......1 DL: 1111..11 [0] + [SEQ] multislot class 45 - UL: .......1 DL: 1111..11 [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] test_multislot_total_ascending(): accumulative Enabled PDCH 0 for multislot tests... [ACC] multislot class 0 - UL: .......1 DL: .......1 [0] @@ -287,7 +415,23 @@ [ACC] multislot class 27 - UL: .......1 DL: .......1 [0] [ACC] multislot class 28 - UL: .......1 DL: .......1 [0] [ACC] multislot class 29 - UL: .......1 DL: .......1 [0] - [ACC] multislot class 30 - UL: .......1 DL: .......1 [-22] + [ACC] multislot class 30 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 31 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 32 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 33 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 34 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 35 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 36 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 37 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 38 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 39 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 40 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 41 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 42 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 43 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 44 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 45 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 46 - UL: .......1 DL: .......1 [-22] Enabled PDCH 1 for multislot tests... [ACC] multislot class 0 - UL: ......11 DL: ......11 [0] [ACC] multislot class 1 - UL: .......1 DL: .......1 [0] @@ -319,7 +463,23 @@ [ACC] multislot class 27 - UL: .......1 DL: .......1 [0] [ACC] multislot class 28 - UL: .......1 DL: .......1 [0] [ACC] multislot class 29 - UL: .......1 DL: .......1 [0] - [ACC] multislot class 30 - UL: .......1 DL: .......1 [-22] + [ACC] multislot class 30 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 31 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 32 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 33 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 34 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 35 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 36 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 37 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 38 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 39 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 40 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 41 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 42 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 43 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 44 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 45 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 46 - UL: .......1 DL: .......1 [-22] Enabled PDCH 2 for multislot tests... [ACC] multislot class 0 - UL: .....11. DL: .....111 [0] [ACC] multislot class 1 - UL: ......1. DL: ......1. [0] @@ -351,7 +511,23 @@ [ACC] multislot class 27 - UL: ......1. DL: ......1. [0] [ACC] multislot class 28 - UL: ......1. DL: ......1. [0] [ACC] multislot class 29 - UL: ......1. DL: ......1. [0] - [ACC] multislot class 30 - UL: ......1. DL: ......1. [-22] + [ACC] multislot class 30 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 31 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 32 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 33 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 34 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 35 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 36 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 37 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 38 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 39 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 40 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 41 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 42 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 43 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 44 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 45 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 46 - UL: ......1. DL: ......1. [-22] Enabled PDCH 3 for multislot tests... [ACC] multislot class 0 - UL: .....1.. DL: ....1111 [0] [ACC] multislot class 1 - UL: .....1.. DL: .....1.. [0] @@ -383,7 +559,23 @@ [ACC] multislot class 27 - UL: .....1.. DL: .....1.. [0] [ACC] multislot class 28 - UL: .....1.. DL: .....1.. [0] [ACC] multislot class 29 - UL: .....1.. DL: .....1.. [0] - [ACC] multislot class 30 - UL: .....1.. DL: .....1.. [-22] + [ACC] multislot class 30 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 31 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 32 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 33 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 34 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 35 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 36 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 37 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 38 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 39 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 40 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 41 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 42 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 43 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 44 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 45 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 46 - UL: .....1.. DL: .....1.. [-22] Enabled PDCH 4 for multislot tests... [ACC] multislot class 0 - UL: .....1.. DL: ....1111 [0] [ACC] multislot class 1 - UL: .....1.. DL: .....1.. [0] @@ -415,7 +607,23 @@ [ACC] multislot class 27 - UL: .....1.. DL: .....1.. [0] [ACC] multislot class 28 - UL: .....1.. DL: .....1.. [0] [ACC] multislot class 29 - UL: .....1.. DL: .....1.. [0] - [ACC] multislot class 30 - UL: .....1.. DL: .....1.. [-22] + [ACC] multislot class 30 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 31 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 32 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 33 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 34 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 35 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 36 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 37 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 38 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 39 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 40 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 41 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 42 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 43 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 44 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 45 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 46 - UL: .....1.. DL: .....1.. [-22] Enabled PDCH 5 for multislot tests... [ACC] multislot class 0 - UL: .....1.. DL: ....1111 [0] [ACC] multislot class 1 - UL: .....1.. DL: .....1.. [0] @@ -447,7 +655,23 @@ [ACC] multislot class 27 - UL: .....1.. DL: .....1.. [0] [ACC] multislot class 28 - UL: .....1.. DL: .....1.. [0] [ACC] multislot class 29 - UL: .....1.. DL: .....1.. [0] - [ACC] multislot class 30 - UL: .....1.. DL: .....1.. [-22] + [ACC] multislot class 30 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 31 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 32 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 33 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 34 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 35 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 36 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 37 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 38 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 39 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 40 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 41 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 42 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 43 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 44 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 45 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 46 - UL: .....1.. DL: .....1.. [-22] Enabled PDCH 6 for multislot tests... [ACC] multislot class 0 - UL: .....1.. DL: ....1111 [0] [ACC] multislot class 1 - UL: .....1.. DL: .....1.. [0] @@ -479,7 +703,23 @@ [ACC] multislot class 27 - UL: .....1.. DL: .....1.. [0] [ACC] multislot class 28 - UL: .....1.. DL: .....1.. [0] [ACC] multislot class 29 - UL: .....1.. DL: .....1.. [0] - [ACC] multislot class 30 - UL: .....1.. DL: .....1.. [-22] + [ACC] multislot class 30 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 31 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 32 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 33 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 34 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 35 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 36 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 37 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 38 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 39 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 40 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 41 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 42 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 43 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 44 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 45 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 46 - UL: .....1.. DL: .....1.. [-22] Enabled PDCH 7 for multislot tests... [ACC] multislot class 0 - UL: .......1 DL: 11....11 [0] [ACC] multislot class 1 - UL: .......1 DL: .......1 [0] @@ -511,7 +751,23 @@ [ACC] multislot class 27 - UL: .......1 DL: .......1 [0] [ACC] multislot class 28 - UL: .......1 DL: .......1 [0] [ACC] multislot class 29 - UL: .......1 DL: .......1 [0] - [ACC] multislot class 30 - UL: .......1 DL: .......1 [-22] + [ACC] multislot class 30 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 31 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 32 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 33 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 34 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 35 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 36 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 37 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 38 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 39 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 40 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 41 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 42 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 43 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 44 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 45 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 46 - UL: .......1 DL: .......1 [-22] test_multislot_total_descending(): sequential Enabled PDCH 7 for multislot tests... [SEQ] multislot class 0 - UL: 1....... DL: 1....... [0] @@ -544,7 +800,23 @@ [SEQ] multislot class 27 - UL: 1....... DL: 1....... [0] [SEQ] multislot class 28 - UL: 1....... DL: 1....... [0] [SEQ] multislot class 29 - UL: 1....... DL: 1....... [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 31 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 32 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 33 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 34 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 35 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 36 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 37 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 38 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 39 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 40 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 41 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 42 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 43 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 44 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 45 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] Enabled PDCH 6 for multislot tests... [SEQ] multislot class 0 - UL: 11...... DL: 11...... [0] [SEQ] multislot class 1 - UL: .1...... DL: .1...... [0] @@ -576,7 +848,23 @@ [SEQ] multislot class 27 - UL: 11...... DL: 11...... [0] [SEQ] multislot class 28 - UL: 11...... DL: 11...... [0] [SEQ] multislot class 29 - UL: 11...... DL: 11...... [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: .1...... DL: 11...... [0] + [SEQ] multislot class 31 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 32 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 33 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 34 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 35 - UL: .1...... DL: 11...... [0] + [SEQ] multislot class 36 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 37 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 38 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 39 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 40 - UL: .1...... DL: 11...... [0] + [SEQ] multislot class 41 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 42 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 43 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 44 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 45 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] Enabled PDCH 5 for multislot tests... [SEQ] multislot class 0 - UL: 11...... DL: 111..... [0] [SEQ] multislot class 1 - UL: ..1..... DL: ..1..... [0] @@ -608,7 +896,23 @@ [SEQ] multislot class 27 - UL: 11...... DL: 111..... [0] [SEQ] multislot class 28 - UL: 11...... DL: 111..... [0] [SEQ] multislot class 29 - UL: 11...... DL: 111..... [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: .1...... DL: 111..... [0] + [SEQ] multislot class 31 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 32 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 33 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 34 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 35 - UL: .1...... DL: 111..... [0] + [SEQ] multislot class 36 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 37 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 38 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 39 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 40 - UL: .1...... DL: 111..... [0] + [SEQ] multislot class 41 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 42 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 43 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 44 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 45 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] Enabled PDCH 4 for multislot tests... [SEQ] multislot class 0 - UL: .1...... DL: 1111.... [0] [SEQ] multislot class 1 - UL: ...1.... DL: ...1.... [0] @@ -640,7 +944,23 @@ [SEQ] multislot class 27 - UL: .1...... DL: 1111.... [0] [SEQ] multislot class 28 - UL: .1...... DL: 1111.... [0] [SEQ] multislot class 29 - UL: .1...... DL: 1111.... [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 31 - UL: 11...... DL: 1111.... [0] + [SEQ] multislot class 32 - UL: 11...... DL: 1111.... [0] + [SEQ] multislot class 33 - UL: 11...... DL: 1111.... [0] + [SEQ] multislot class 34 - UL: 11...... DL: 1111.... [0] + [SEQ] multislot class 35 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 36 - UL: 11...... DL: 1111.... [0] + [SEQ] multislot class 37 - UL: 11...... DL: 1111.... [0] + [SEQ] multislot class 38 - UL: 11...... DL: 1111.... [0] + [SEQ] multislot class 39 - UL: 11...... DL: 1111.... [0] + [SEQ] multislot class 40 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 41 - UL: 11...... DL: 1111.... [0] + [SEQ] multislot class 42 - UL: 11...... DL: 1111.... [0] + [SEQ] multislot class 43 - UL: 11...... DL: 1111.... [0] + [SEQ] multislot class 44 - UL: 11...... DL: 1111.... [0] + [SEQ] multislot class 45 - UL: 11...... DL: 1111.... [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] Enabled PDCH 3 for multislot tests... [SEQ] multislot class 0 - UL: ..1..... DL: .1111... [0] [SEQ] multislot class 1 - UL: ....1... DL: ....1... [0] @@ -672,7 +992,23 @@ [SEQ] multislot class 27 - UL: ..1..... DL: .1111... [0] [SEQ] multislot class 28 - UL: ..1..... DL: .1111... [0] [SEQ] multislot class 29 - UL: ..1..... DL: .1111... [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: .1...... DL: 11111... [0] + [SEQ] multislot class 31 - UL: .1...... DL: 11111... [0] + [SEQ] multislot class 32 - UL: .1...... DL: 11111... [0] + [SEQ] multislot class 33 - UL: .1...... DL: 11111... [0] + [SEQ] multislot class 34 - UL: .1...... DL: 11111... [0] + [SEQ] multislot class 35 - UL: .1...... DL: 11111... [0] + [SEQ] multislot class 36 - UL: .1...... DL: 11111... [0] + [SEQ] multislot class 37 - UL: .1...... DL: 11111... [0] + [SEQ] multislot class 38 - UL: .1...... DL: 11111... [0] + [SEQ] multislot class 39 - UL: .1...... DL: 11111... [0] + [SEQ] multislot class 40 - UL: .1...... DL: 11111... [0] + [SEQ] multislot class 41 - UL: 11...... DL: 11111... [0] + [SEQ] multislot class 42 - UL: 11...... DL: 11111... [0] + [SEQ] multislot class 43 - UL: 11...... DL: 11111... [0] + [SEQ] multislot class 44 - UL: 11...... DL: 11111... [0] + [SEQ] multislot class 45 - UL: 11...... DL: 11111... [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] Enabled PDCH 2 for multislot tests... [SEQ] multislot class 0 - UL: ...1.... DL: ..1111.. [0] [SEQ] multislot class 1 - UL: .....1.. DL: .....1.. [0] @@ -704,7 +1040,23 @@ [SEQ] multislot class 27 - UL: ...1.... DL: ..1111.. [0] [SEQ] multislot class 28 - UL: ...1.... DL: ..1111.. [0] [SEQ] multislot class 29 - UL: ...1.... DL: ..1111.. [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: ..1..... DL: .11111.. [0] + [SEQ] multislot class 31 - UL: ..1..... DL: .11111.. [0] + [SEQ] multislot class 32 - UL: ..1..... DL: .11111.. [0] + [SEQ] multislot class 33 - UL: ..1..... DL: .11111.. [0] + [SEQ] multislot class 34 - UL: ..1..... DL: .11111.. [0] + [SEQ] multislot class 35 - UL: ..1..... DL: .11111.. [0] + [SEQ] multislot class 36 - UL: ..1..... DL: .11111.. [0] + [SEQ] multislot class 37 - UL: ..1..... DL: .11111.. [0] + [SEQ] multislot class 38 - UL: ..1..... DL: .11111.. [0] + [SEQ] multislot class 39 - UL: ..1..... DL: .11111.. [0] + [SEQ] multislot class 40 - UL: .1...... DL: 111111.. [0] + [SEQ] multislot class 41 - UL: .1...... DL: 111111.. [0] + [SEQ] multislot class 42 - UL: .1...... DL: 111111.. [0] + [SEQ] multislot class 43 - UL: .1...... DL: 111111.. [0] + [SEQ] multislot class 44 - UL: .1...... DL: 111111.. [0] + [SEQ] multislot class 45 - UL: .1...... DL: 111111.. [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] Enabled PDCH 1 for multislot tests... [SEQ] multislot class 0 - UL: ....1... DL: ...1111. [0] [SEQ] multislot class 1 - UL: ......1. DL: ......1. [0] @@ -736,7 +1088,23 @@ [SEQ] multislot class 27 - UL: ....1... DL: ...1111. [0] [SEQ] multislot class 28 - UL: ....1... DL: ...1111. [0] [SEQ] multislot class 29 - UL: ....1... DL: ...1111. [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: ...1.... DL: ..11111. [0] + [SEQ] multislot class 31 - UL: ...1.... DL: ..11111. [0] + [SEQ] multislot class 32 - UL: ...1.... DL: ..11111. [0] + [SEQ] multislot class 33 - UL: ...1.... DL: ..11111. [0] + [SEQ] multislot class 34 - UL: ...1.... DL: ..11111. [0] + [SEQ] multislot class 35 - UL: ...1.... DL: ..11111. [0] + [SEQ] multislot class 36 - UL: ...1.... DL: ..11111. [0] + [SEQ] multislot class 37 - UL: ...1.... DL: ..11111. [0] + [SEQ] multislot class 38 - UL: ...1.... DL: ..11111. [0] + [SEQ] multislot class 39 - UL: ...1.... DL: ..11111. [0] + [SEQ] multislot class 40 - UL: ..1..... DL: .111111. [0] + [SEQ] multislot class 41 - UL: ..1..... DL: .111111. [0] + [SEQ] multislot class 42 - UL: ..1..... DL: .111111. [0] + [SEQ] multislot class 43 - UL: ..1..... DL: .111111. [0] + [SEQ] multislot class 44 - UL: ..1..... DL: .111111. [0] + [SEQ] multislot class 45 - UL: ..1..... DL: .111111. [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] Enabled PDCH 0 for multislot tests... [SEQ] multislot class 0 - UL: .......1 DL: 11....11 [0] [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] @@ -768,7 +1136,23 @@ [SEQ] multislot class 27 - UL: .......1 DL: 11....11 [0] [SEQ] multislot class 28 - UL: .......1 DL: 11....11 [0] [SEQ] multislot class 29 - UL: .......1 DL: 11....11 [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 31 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 32 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 33 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 34 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 35 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 36 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 37 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 38 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 39 - UL: .......1 DL: 111...11 [0] + [SEQ] multislot class 40 - UL: .......1 DL: 1111..11 [0] + [SEQ] multislot class 41 - UL: .......1 DL: 1111..11 [0] + [SEQ] multislot class 42 - UL: .......1 DL: 1111..11 [0] + [SEQ] multislot class 43 - UL: .......1 DL: 1111..11 [0] + [SEQ] multislot class 44 - UL: .......1 DL: 1111..11 [0] + [SEQ] multislot class 45 - UL: .......1 DL: 1111..11 [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] test_multislot_total_descending(): accumulative Enabled PDCH 7 for multislot tests... [ACC] multislot class 0 - UL: 1....... DL: 1....... [0] @@ -801,7 +1185,23 @@ [ACC] multislot class 27 - UL: 1....... DL: 1....... [0] [ACC] multislot class 28 - UL: 1....... DL: 1....... [0] [ACC] multislot class 29 - UL: 1....... DL: 1....... [0] - [ACC] multislot class 30 - UL: 1....... DL: 1....... [-22] + [ACC] multislot class 30 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 31 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 32 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 33 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 34 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 35 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 36 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 37 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 38 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 39 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 40 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 41 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 42 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 43 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 44 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 45 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 46 - UL: 1....... DL: 1....... [-22] Enabled PDCH 6 for multislot tests... [ACC] multislot class 0 - UL: 11...... DL: 11...... [0] [ACC] multislot class 1 - UL: .1...... DL: .1...... [0] @@ -833,7 +1233,23 @@ [ACC] multislot class 27 - UL: .1...... DL: .1...... [0] [ACC] multislot class 28 - UL: .1...... DL: .1...... [0] [ACC] multislot class 29 - UL: .1...... DL: .1...... [0] - [ACC] multislot class 30 - UL: .1...... DL: .1...... [-22] + [ACC] multislot class 30 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 31 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 32 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 33 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 34 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 35 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 36 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 37 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 38 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 39 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 40 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 41 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 42 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 43 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 44 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 45 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 46 - UL: .1...... DL: .1...... [-22] Enabled PDCH 5 for multislot tests... [ACC] multislot class 0 - UL: 11...... DL: 111..... [0] [ACC] multislot class 1 - UL: .1...... DL: .1...... [0] @@ -865,7 +1281,23 @@ [ACC] multislot class 27 - UL: .1...... DL: .1...... [0] [ACC] multislot class 28 - UL: .1...... DL: .1...... [0] [ACC] multislot class 29 - UL: .1...... DL: .1...... [0] - [ACC] multislot class 30 - UL: .1...... DL: .1...... [-22] + [ACC] multislot class 30 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 31 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 32 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 33 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 34 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 35 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 36 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 37 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 38 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 39 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 40 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 41 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 42 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 43 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 44 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 45 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 46 - UL: .1...... DL: .1...... [-22] Enabled PDCH 4 for multislot tests... [ACC] multislot class 0 - UL: .1...... DL: 1111.... [0] [ACC] multislot class 1 - UL: .1...... DL: .1...... [0] @@ -897,7 +1329,23 @@ [ACC] multislot class 27 - UL: .1...... DL: .1...... [0] [ACC] multislot class 28 - UL: .1...... DL: .1...... [0] [ACC] multislot class 29 - UL: .1...... DL: .1...... [0] - [ACC] multislot class 30 - UL: .1...... DL: .1...... [-22] + [ACC] multislot class 30 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 31 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 32 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 33 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 34 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 35 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 36 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 37 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 38 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 39 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 40 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 41 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 42 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 43 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 44 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 45 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 46 - UL: .1...... DL: .1...... [-22] Enabled PDCH 3 for multislot tests... [ACC] multislot class 0 - UL: ..1..... DL: .1111... [0] [ACC] multislot class 1 - UL: ..1..... DL: ..1..... [0] @@ -929,7 +1377,23 @@ [ACC] multislot class 27 - UL: ..1..... DL: ..1..... [0] [ACC] multislot class 28 - UL: ..1..... DL: ..1..... [0] [ACC] multislot class 29 - UL: ..1..... DL: ..1..... [0] - [ACC] multislot class 30 - UL: ..1..... DL: ..1..... [-22] + [ACC] multislot class 30 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 31 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 32 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 33 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 34 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 35 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 36 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 37 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 38 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 39 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 40 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 41 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 42 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 43 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 44 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 45 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 46 - UL: ..1..... DL: ..1..... [-22] Enabled PDCH 2 for multislot tests... [ACC] multislot class 0 - UL: ...1.... DL: ..1111.. [0] [ACC] multislot class 1 - UL: ...1.... DL: ...1.... [0] @@ -961,7 +1425,23 @@ [ACC] multislot class 27 - UL: ...1.... DL: ...1.... [0] [ACC] multislot class 28 - UL: ...1.... DL: ...1.... [0] [ACC] multislot class 29 - UL: ...1.... DL: ...1.... [0] - [ACC] multislot class 30 - UL: ...1.... DL: ...1.... [-22] + [ACC] multislot class 30 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 31 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 32 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 33 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 34 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 35 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 36 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 37 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 38 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 39 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 40 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 41 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 42 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 43 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 44 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 45 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 46 - UL: ...1.... DL: ...1.... [-22] Enabled PDCH 1 for multislot tests... [ACC] multislot class 0 - UL: ....1... DL: ...1111. [0] [ACC] multislot class 1 - UL: ....1... DL: ....1... [0] @@ -993,7 +1473,23 @@ [ACC] multislot class 27 - UL: ....1... DL: ....1... [0] [ACC] multislot class 28 - UL: ....1... DL: ....1... [0] [ACC] multislot class 29 - UL: ....1... DL: ....1... [0] - [ACC] multislot class 30 - UL: ....1... DL: ....1... [-22] + [ACC] multislot class 30 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 31 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 32 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 33 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 34 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 35 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 36 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 37 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 38 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 39 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 40 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 41 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 42 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 43 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 44 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 45 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 46 - UL: ....1... DL: ....1... [-22] Enabled PDCH 0 for multislot tests... [ACC] multislot class 0 - UL: .......1 DL: 11....11 [0] [ACC] multislot class 1 - UL: .......1 DL: .......1 [0] @@ -1025,7 +1521,23 @@ [ACC] multislot class 27 - UL: .......1 DL: .......1 [0] [ACC] multislot class 28 - UL: .......1 DL: .......1 [0] [ACC] multislot class 29 - UL: .......1 DL: .......1 [0] - [ACC] multislot class 30 - UL: .......1 DL: .......1 [-22] + [ACC] multislot class 30 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 31 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 32 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 33 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 34 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 35 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 36 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 37 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 38 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 39 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 40 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 41 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 42 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 43 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 44 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 45 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 46 - UL: .......1 DL: .......1 [-22] test_multislot_middle(): sequential [SEQ] multislot class 0 - UL: ...11... DL: ...111.. [0] [SEQ] multislot class 1 - UL: .....1.. DL: .....1.. [0] @@ -1057,7 +1569,23 @@ [SEQ] multislot class 27 - UL: ...11... DL: ...111.. [0] [SEQ] multislot class 28 - UL: ...11... DL: ...111.. [0] [SEQ] multislot class 29 - UL: ...11... DL: ...111.. [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: ....1... DL: ...111.. [0] + [SEQ] multislot class 31 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 32 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 33 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 34 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 35 - UL: ....1... DL: ...111.. [0] + [SEQ] multislot class 36 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 37 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 38 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 39 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 40 - UL: ....1... DL: ...111.. [0] + [SEQ] multislot class 41 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 42 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 43 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 44 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 45 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] test_multislot_middle(): accumulative [ACC] multislot class 0 - UL: ...11... DL: ...111.. [0] [ACC] multislot class 1 - UL: ....1... DL: ....1... [0] @@ -1089,7 +1617,23 @@ [ACC] multislot class 27 - UL: ....1... DL: ....1... [0] [ACC] multislot class 28 - UL: ....1... DL: ....1... [0] [ACC] multislot class 29 - UL: ....1... DL: ....1... [0] - [ACC] multislot class 30 - UL: ....1... DL: ....1... [-22] + [ACC] multislot class 30 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 31 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 32 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 33 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 34 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 35 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 36 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 37 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 38 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 39 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 40 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 41 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 42 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 43 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 44 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 45 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 46 - UL: ....1... DL: ....1... [-22] test_multislot_ends(): sequential [SEQ] multislot class 0 - UL: 1......1 DL: 1......1 [0] [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] @@ -1121,7 +1665,23 @@ [SEQ] multislot class 27 - UL: 1......1 DL: 1......1 [0] [SEQ] multislot class 28 - UL: 1......1 DL: 1......1 [0] [SEQ] multislot class 29 - UL: 1......1 DL: 1......1 [0] - [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + [SEQ] multislot class 30 - UL: .......1 DL: 1......1 [0] + [SEQ] multislot class 31 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 32 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 33 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 34 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 35 - UL: .......1 DL: 1......1 [0] + [SEQ] multislot class 36 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 37 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 38 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 39 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 40 - UL: .......1 DL: 1......1 [0] + [SEQ] multislot class 41 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 42 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 43 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 44 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 45 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 46 - UL: ........ DL: ........ [-22] test_multislot_ends(): accumulative [ACC] multislot class 0 - UL: 1......1 DL: 1......1 [0] [ACC] multislot class 1 - UL: .......1 DL: .......1 [0] @@ -1153,4 +1713,20 @@ [ACC] multislot class 27 - UL: .......1 DL: .......1 [0] [ACC] multislot class 28 - UL: .......1 DL: .......1 [0] [ACC] multislot class 29 - UL: .......1 DL: .......1 [0] - [ACC] multislot class 30 - UL: .......1 DL: .......1 [-22] + [ACC] multislot class 30 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 31 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 32 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 33 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 34 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 35 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 36 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 37 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 38 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 39 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 40 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 41 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 42 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 43 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 44 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 45 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 46 - UL: .......1 DL: .......1 [-22] -- To view, visit https://gerrit.osmocom.org/4072 To unsubscribe, visit https://gerrit.osmocom.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I1ef2eb99c517f25e7d1e71b985a3e0eb3879eb2c Gerrit-PatchSet: 3 Gerrit-Project: osmo-pcu Gerrit-Branch: master Gerrit-Owner: Max <msuraev at sysmocom.de> Gerrit-Reviewer: Harald Welte <laforge at gnumonks.org> Gerrit-Reviewer: Holger Freyther <holger at freyther.de> Gerrit-Reviewer: Jenkins Builder Gerrit-Reviewer: Max <msuraev at sysmocom.de>