Architecture of oscomBB

This is merely a historical archive of years 2008-2021, before the migration to mailman3.

A maintained and still updated list archive can be found at https://lists.osmocom.org/hyperkitty/list/baseband-devel@lists.osmocom.org/.

nghia phan nghia.phan31 at gmail.com
Sun Sep 18 08:14:24 UTC 2011


Hello everyone,

I'm new to OscomBB and have few questions about its architecture. I have
ordered the C123 and the serial cable. Note: I have OpenBTS running quite
well and would like now to explore the other end.

I did look at the Software Overview page and have the following questions:
a/ where can I log the raw burst (156 bits)? [ not the IQ samples ] on the
PC? on the ARM7?
b/ on the downllink path, how is the FCH detection process split between
dsp, arm7 and PC? ie from raw burst to FCH detection indication and offset
value.
c/ on the downllink path, how is the SCH decode process split between dsp,
arm7 and PC? ie from raw burst to GSM frame number, BSIC etc..
d/ on the downllink path, how is the BCCH decode process split between dsp,
arm7 and PC? ie from raw burst to System Informations...
d/ on the uplink path, how the RACH encode process (RACH_REQ) is split
between dsp, arm7 and PC?

Thank your for your kind answers.

Rgds
Nghia
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.osmocom.org/pipermail/baseband-devel/attachments/20110918/4146674f/attachment.htm>


More information about the baseband-devel mailing list